Low Power Test Generator for Scan Chain Thermal Management

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Solution Overview

Problem

Integrated circuit testing consumes excessive power during scan testing, leading to thermal issues, voltage noise, and reliability concerns, as existing power reduction methods are inadequate in minimizing switching activity and fault detection efficiency.

Innovation Solution

A low power test generator comprising a pseudo-random pattern generator unit, a toggle control unit, and a hold register unit, which generates toggle control data to replace output values with constants, reducing switching activity by dividing test patterns into hold and toggle periods, and using a phase shifter to combine bits for scan chains.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If full-toggle scan pattern is used for scan testing, then fault detection capability is improved, but power consumption increases significantly

Engineering Contradiction:
Improvefault detection capabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the test pattern generation adaptive and flexible. The LFSR-based pattern generator dynamically adjusts the test sequences based on the circuit under test characteristics, allowing optimization between fault detection and power consumption without fixed full-toggle patterns

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameters of test patterns by using LFSR-generated sequences with controlled transition densities. By modifying pattern characteristics (weight, transition frequency, distribution) rather than using fixed full-toggle patterns, the system achieves lower power consumption while maintaining adequate fault detection

Inventive Principle:
Principle #35Parameter changes

2Productivity

If high data activity is used during scan testing, then testing thoroughness is improved, but thermal issues and voltage noise increase

Engineering Contradiction:
Improvetesting thoroughnessVSAvoidthermal issues
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The patent uses periodic action through LFSR-based test pattern generation that creates structured, repeating sequences with controlled activity levels. The periodic nature of LFSR output allows for predictable power consumption patterns and enables better thermal management compared to random high-activity patterns

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent employs copying by using LFSR-generated test patterns that replicate and vary existing pattern structures. Instead of generating entirely new high-activity patterns, the system copies and transforms pattern sequences through LFSR feedback mechanisms, reducing overall switching activity while maintaining test coverage

Inventive Principle:
Principle #26Copying

3Reliability

If conventional LFSR test patterns are used, then fault coverage is maintained, but switching activity cannot be sufficiently reduced

Engineering Contradiction:
Improvefault coverageVSAvoidswitching activity
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent applies segmentation by dividing the test pattern generation into multiple LFSR stages with different weights and transition characteristics. By segmenting the pattern generation process, the system can control the switching activity in each segment independently while maintaining overall fault coverage through coordinated operation of segments

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent uses an intermediary approach by introducing additional logic between the LFSR and the circuit under test. This intermediary layer processes and modifies the LFSR output patterns to reduce switching activity at the circuit inputs while preserving the essential fault detection capability through controlled pattern transformation

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8683280B2Test generator for low power built-in self-test
Publication Date: 2014.03.25 SIEMENS INDUSTRY SOFTWARE INC
  • US8683280B2 patent drawing
  • US8683280B2 patent drawing
  • US8683280B2 patent drawing

AI summary

Aspects of the invention relate to low power BIST-based testing. A low power test generator may comprise a pseudo-random pattern generator unit, a toggle control unit configured to generate toggle control data based on bit sequence data generated by the pseudo-random pattern generator unit, and a hold register unit configured to generate low power test pattern data by replacing, based on the toggle control data received from the toggle control unit, data from some or all of outputs of the pseudo-random pattern generator unit with constant values during various time periods. The low power test generator may further comprise a phase shifter configured to combine bits of the low power test pattern data for driving scan chains.