Low-Power Timing Architecture With Secondary Oscillator Scheduling

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Solution Overview

Problem

Conventional real-time embedded systems face challenges in minimizing power consumption due to the use of high frequency oscillators and microprocessors, which increase power consumption and require precise timing, while also needing to reduce the number of component activations to minimize energy usage.

Innovation Solution

Implementing a low power oscillator with lower frequency in combination with high resolution timing information, and utilizing a microsequencer to perform timing-critical tasks instead of a microprocessor, allowing for precise event triggering and reduced power consumption by activating components only when necessary.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high frequency oscillators are used to maintain precise timing, then timing precision is improved, but power consumption increases

Engineering Contradiction:
Improvetiming precisionVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The timing system is segmented into two parts: a low-power oscillator running at lower frequency and a high-resolution counter that accumulates timing information. This segmentation allows the system to maintain precise timing measurements without requiring the entire system to operate at high frequency, thus reducing power consumption while preserving timing precision.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system changes the operating parameters by using a low-frequency oscillator combined with high-resolution timing counters. Instead of relying on high frequency for precision, the system achieves precise timing through high-resolution measurement of lower frequency cycles, effectively decoupling frequency from precision and allowing low-power operation.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If microprocessors are used to perform timing-critical tasks, then functionality and programmability are improved, but power consumption increases

Engineering Contradiction:
ImproveprogrammabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The invention extracts timing-critical functions from the microprocessor and implements them in dedicated hardware (timers and counters). This extraction allows the microprocessor to be powered down or put into low-power modes during timing-critical operations, reducing overall power consumption while maintaining full programmability for non-timing functions.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The timing system is designed to be self-service through autonomous hardware timers and counters that automatically perform timing-critical tasks without requiring microprocessor intervention. This self-service capability allows the microprocessor to remain inactive during these operations, significantly reducing power consumption while maintaining system functionality.

Inventive Principle:
Principle #25Self-service

3Speed

If components are frequently turned on to maintain system responsiveness, then system responsiveness is improved, but energy consumption increases due to capacitance charging and oscillator stabilization

Engineering Contradiction:
Improvesystem responsivenessVSAvoidenergy consumption
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The system performs preliminary actions by pre-configuring timing parameters and keeping the low-power oscillator continuously running at a stable frequency. This preliminary setup allows the system to quickly respond to events without requiring full component activation, reducing the energy associated with repeated startup and stabilization cycles.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses periodic timing intervals based on the stable low-power oscillator to manage component activation. Instead of frequent on/off transitions, components are activated in periodic cycles that align with the oscillator period, reducing the number of transitions and associated energy losses from capacitance charging and oscillator stabilization.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS9785219B2Low power timing, configuring, and scheduling
Publication Date: 2017.10.10 ANALOG DEVICES INT UNLTD CO
  • US9785219B2 patent drawing
  • US9785219B2 patent drawing
  • US9785219B2 patent drawing

AI summary

A device reduces its energy consumption using a relatively lower frequency and lower power secondary oscillator to maintain timing information when a higher frequency and higher power primary oscillator is inactivated. The secondary oscillator maintains timing information at a higher resolution than the period of the oscillator, so as to conserve synchronization when the higher frequency, higher power primary oscillator is inactivated. In some embodiments, a microsequencer is programmably configured to control an integrated radio receiver and transmitter using less power than an associated microprocessor would use to perform the same functions. In other embodiments, flexible event timing facilitates the merging of wake-up events to reduce the energy consumed by wake-up operations in the device.