Low Power Voltage Regulator for FRAM RFID Tags
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Solution Overview
Problem
Passive RFID tags using EEPROM memory are inadequate for high-throughput applications due to slow data transfer rates and are challenged by variations in temperature, power constraints, and intermittent power supply issues, particularly when utilizing faster memory technologies like FRAM.
Innovation Solution
A low power voltage regulator design incorporating a diode-connected transistor pair and a bias current for sub-threshold mode operation, coupled with a buffer amplifier to provide a regulated output voltage, along with dynamic clamping and delay circuits to stabilize power supply and prevent overshoot, enhancing the robustness and efficiency of FRAM-based RFID tags.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If EEPROM memory is used in passive RFID tags, then power consumption is low and operation is simple, but data throughput is slow and cannot meet high-throughput application requirements
Solution Approach 1:
The patent changes the memory technology parameter from EEPROM to FRAM (Ferroelectric RAM) to achieve higher data throughput. FRAM provides faster write speeds and higher throughput while maintaining low power consumption, directly addressing the productivity limitation of EEPROM in high-throughput RFID applications.
2Productivity
If FRAM memory is used to increase data throughput, then high-speed operation is achieved, but the circuit becomes more sensitive to power supply variations and temperature changes
Solution Approach 1:
The patent implements a voltage regulator circuit with feedback control to monitor and adjust the power supply voltage to the FRAM memory. This feedback mechanism compensates for power supply variations and temperature changes, maintaining stable operation of the FRAM circuit and improving reliability in high-throughput applications.
Solution Approach 2:
The patent adds protection circuits and voltage clamping mechanisms before the FRAM memory to cushion against power supply spikes and variations. These circuits preemptively protect the sensitive FRAM circuit from damage due to power variations and temperature effects, ensuring reliable high-speed operation.
3Reliability
If voltage regulator is used to provide stable power supply, then power supply stability is improved, but power consumption increases
Solution Approach 1:
The patent employs a dynamic voltage regulator that adjusts its regulation activity based on the operational state of the RFID tag. During high-throughput FRAM operations, the regulator provides stable voltage. During low-activity periods, the regulator reduces its activity to minimize power consumption, dynamically balancing stability and energy efficiency.
Solution Approach 2:
The patent implements partial voltage regulation only for the critical FRAM memory circuit rather than regulating the entire RFID tag power supply. This selective regulation approach provides necessary stability to the FRAM circuit while avoiding the excessive power consumption that would result from regulating all circuits in the tag.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides stable and efficient power supply to FRAM-based RFID tags, enabling robust operation across varying conditions, improved data throughput, and reduced power consumption, making them suitable for demanding applications.
Implementation Method 1
A low power voltage regulator includes an output node for providing a regulated output voltage, a first diode-connected transistor of a first polarity type (P-channel transistor) in series with a second diode-connected transistor of a second polarity type (N-channel transistor) coupled between the output node and ground
Implementation Method 2
The low power voltage regulator further includes a buffer amplifier or emitter (or source) follower stage to provide a low impedance regulated voltage
Data Source
AI summary
A voltage regulator for low power operation of digital circuits includes an output node for providing a regulated output voltage, a diode-connected P-channel transistor in series with a second diode-connected N-channel transistor coupled between the output node and ground, and a bias current having a value for biasing the first and second diode-connected transistors in a sub-threshold mode of operation. The low power voltage regulator further includes a buffer amplifier or emitter or source follower stage to provide a low impedance regulated voltage. The bias current may be generated by a bandgap circuit.