Low-Profile Optical Fiber Edge Coupling to Shallow Etched Slots

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The existing etching processes for photonic integrated circuits (PICs) are slow and expensive, limiting the depth of the etched slot, which prevents effective edge coupling of conventional round optical fibers due to their diameter exceeding the slot depth, leading to manufacturing inefficiencies and increased costs.

Innovation Solution

The use of low-profile optical fibers, such as D-shaped or flat optical fibers, which have a non-rotationally symmetric end face and a cladding layer with a minimum perimeter point closer to the core, allowing them to be edge-coupled to the waveguide layer within a shallow etched slot of 25-50 μm, reducing manufacturing time and costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional round optical fibers are used with deep etching processes, then effective edge coupling to waveguide layer is achieved, but manufacturing time and costs increase significantly

Engineering Contradiction:
Improveedge coupling effectivenessVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies asymmetry by transitioning from conventional round optical fibers to D-shaped or flat optical fibers with non-rotationally symmetric cross-sections. This asymmetric geometry allows the fiber to fit within shallow etched slots (25-50 μm depth) while maintaining effective edge coupling to the waveguide layer, eliminating the need for deep etching processes and reducing manufacturing time and costs.

Inventive Principle:
Principle #4Asymmetry

2Productivity

If etched slot depth is reduced to 25-50 μm, then manufacturing cost and time are reduced, but conventional round optical fibers cannot be aligned with waveguide layer

Engineering Contradiction:
Improvemanufacturing efficiencyVSAvoidfiber-waveguide alignment
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The asymmetric D-shaped or flat fiber geometry enables the fiber to be positioned within shallow etched slots while maintaining proper alignment with the waveguide layer. The non-circular cross-section provides inherent positioning features that facilitate precise alignment without requiring deep etching, thus maintaining manufacturing precision while improving productivity.

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent applies local quality by creating a shallow etched slot with specific dimensional characteristics (25-50 μm depth) that is optimized for accommodating low-profile optical fibers. This localized structural modification provides the necessary alignment precision for shallow slot configurations while maintaining overall manufacturing efficiency.

Inventive Principle:
Principle #3Local quality

3Reliability

If deep etching process is used, then optical fiber can be properly coupled to waveguide layer, but process cost and time increase

Engineering Contradiction:
Improveoptical coupling performanceVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The asymmetric fiber geometry enables effective optical coupling to be achieved with shallow etched slots, eliminating the need for expensive and time-consuming deep etching processes. This maintains optical coupling performance while significantly reducing manufacturing costs and process complexity.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS11852870B2Optical fiber photonic integrated chip connector interfaces, photonic integrated chip assemblies, and methods of fabricating the same
Publication Date: 2023.12.26 CORNING RES & DEV CORP
  • US11852870B2 patent drawing
  • US11852870B2 patent drawing
  • US11852870B2 patent drawing

AI summary

Optical fiber photonic integrated chip connector interfaces and photonic integrated chip assemblies utilizing low-profile optical fibers and methods thereof are disclosed. In one embodiment, an optical fiber photonic integrated chip (PIC) connector interface includes at least one low-profile optical fiber having an end face, at least one core, and a cladding layer, wherein the end face is non-rotationally symmetric with respect to the at least one core, and the cladding layer includes at least one minimum perimeter point that is a minimum distance from the at least one core as compared to remaining perimeter points of the cladding. The PIC connector interface further includes an interconnect substrate including a fiber mounting surface, and a mechanical coupling surface. The at least one low-profile optical fiber is disposed on the fiber mounting surface such that one or more surfaces of the cladding defining the at least one minimum perimeter point faces away from the fiber mounting surface.