Low Quiescent Current Voltage Regulator with Positive Feedback

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Solution Overview

Problem

Conventional voltage regulators, such as low-dropout (LDO) regulators, face high power consumption due to large quiescent currents, which is a challenge in maintaining stability across varying output capacitances and load currents, especially in standby modes.

Innovation Solution

A voltage regulator utilizing a set of current mirror circuits forming a positive feedback loop with a voltage buffer circuit to convert input voltage into output voltage, reducing quiescent current and power consumption by implementing a simplified circuit structure with a loop gain less than 1, allowing for low standby current operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional LDO regulator feedback voltage regulation is used, then output voltage is well-regulated, but quiescent current is on the order of tens of microamperes resulting in high power consumption during standby mode

Engineering Contradiction:
Improveoutput voltage regulation stabilityVSAvoidstandby power consumption
Core Design Contradiction:
ReliabilityVSUse of energy by stationary object

Solution Approach 1:

The patent inverts the conventional feedback approach by using positive feedback through current mirror circuits. Instead of using a traditional voltage feedback loop that requires high quiescent current for stability, the invention uses current mirror circuits with positive feedback to achieve voltage regulation with minimal standby power consumption, directly addressing the contradiction between regulation stability and low standby power.

Inventive Principle:
Principle #13The other way round (Inversion)

2Use of energy by stationary object

If quiescent current is reduced to lower standby power consumption, then power efficiency improves, but stability across range of output capacitances and load-currents becomes difficult to maintain

Engineering Contradiction:
Improvestandby power consumptionVSAvoidstability across varying conditions
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The patent employs feedback mechanisms through current mirror circuits that automatically adjust the output voltage in response to load current and output capacitance variations. The positive feedback loop with loop gain less than 1 provides self-regulation, maintaining stability across varying conditions while keeping quiescent current low, thus resolving the contradiction between power efficiency and stability under varying loads.

Inventive Principle:
Principle #23Feedback

3Use of energy by stationary object

If positive feedback loop with current mirror circuits is used, then quiescent current and standby power consumption are reduced, but circuit complexity and design constraints increase due to loop gain requirements

Engineering Contradiction:
Improvestandby power consumptionVSAvoidcircuit structure complexity
Core Design Contradiction:
Use of energy by stationary objectVSDevice complexity

Solution Approach 1:

The patent changes the operating parameters of the current mirror circuits to achieve loop gain less than 1, which is critical for stable positive feedback operation. By carefully selecting transistor sizes, bias currents, and circuit topology parameters, the invention achieves low standby power consumption while maintaining circuit stability, effectively managing the trade-off between power efficiency and circuit complexity.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9817426B2Low quiescent current voltage regulator with high load-current capability
Publication Date: 2017.11.14 NXP BV
  • US9817426B2 patent drawing
  • US9817426B2 patent drawing
  • US9817426B2 patent drawing

AI summary

Embodiments of voltage regulators and methods for operating a voltage regulator are described. In one embodiment, a voltage regulator includes a set of current mirror circuits configured to convert an input voltage into an output voltage and a voltage buffer circuit configured to buffer a reference voltage for the set of current mirror circuits. The set of current mirror circuits form a positive feedback loop. Other embodiments are also described.