Low Stress IC Package Using Low Modulus Buffer Layer

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Solution Overview

Problem

Conventional IC packaging methods using high modulus molding compounds apply compressive stress to transistors, degrading NMOS transistor performance and potentially causing IC circuit failure, especially for analog transistors.

Innovation Solution

A low stress IC package is formed by using a low modulus molding compound as a stress buffer layer between the IC chip and the high modulus package molding compound, which deforms to absorb shrinkage-induced stress during curing and cooling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Strength

If high modulus molding compound is used to encapsulate the IC chip, then the mechanical strength and structural stability of the package is improved, but compressive stress is applied to the transistors during curing and cooling which degrades NMOS transistor performance

Engineering Contradiction:
Improvemechanical strength of packageVSAvoidtransistor performance
Core Design Contradiction:
StrengthVSReliability

Solution Approach 1:

A low modulus molding compound is introduced as an intermediary stress buffer layer between the high modulus package molding compound and the IC chip. This intermediate layer absorbs the shrinkage-induced compressive stress during curing and cooling, preventing direct stress transmission to the transistors while still providing mechanical support and structural stability to the package.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The invention changes the modulus parameter of the molding compound by using a dual-layer structure: a low modulus compound (softer, more compliant) adjacent to the IC chip and a high modulus compound (stiffer, stronger) for the outer encapsulation. This parameter variation allows the system to simultaneously achieve stress reduction near the chip and mechanical strength in the overall package structure.

Inventive Principle:
Principle #35Parameter changes

2Stability of the object's composition

If high modulus molding compound is used for encapsulation, then the structural stability of the package is improved, but the IC chip is subjected to shrinkage-induced compressive stress which can cause circuit failure

Engineering Contradiction:
Improvestructural stability of packageVSAvoidcompressive stress on IC chip
Core Design Contradiction:
Stability of the object's compositionVSObject-affected harmful factors

Solution Approach 1:

The low modulus molding compound serves as a mediator that decouples the shrinkage stress from the IC chip. During curing and cooling, this intermediate layer deforms to absorb the compressive stress, preventing it from being transmitted to the sensitive transistor structures while the high modulus outer layer maintains overall package structural stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The low modulus molding compound is positioned beforehand adjacent to the IC chip to provide stress cushioning before the high modulus compound shrinks during curing. This pre-positioned compliant layer acts as a shock absorber that protects the chip from stress damage before the harmful stress can be applied.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces stress on the IC chip, maintaining transistor performance within target specifications and preventing IC circuit failure by using a trilayer lead frame with a low modulus molding compound reservoir to buffer the stress from the high modulus package molding compound.

Implementation Method 1

low modulus molding compound... which deforms to absorb shrinkage-induced stress during curing and cooling

Methodology Applied
Scientific EffectElastic deformation: Elasticity

Data Source

PatentUS10566269B2Low stress integrated circuit package
Publication Date: 2020.02.18 TEXAS INSTRUMENTS INC
  • US10566269B2 patent drawing
  • US10566269B2 patent drawing
  • US10566269B2 patent drawing

AI summary

In a described example, an integrated circuit (IC) package includes: an IC chip bonded to a chip mount pad on a lead frame; low modulus molding compound surrounding the IC chip; and IC package molding compound covering the IC chip, and at least a portion of the low modulus molding compound.