Low Stress Pad Structure for Semiconductor Packages
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Solution Overview
Problem
Semiconductor packaging materials face stress issues due to thermal expansion mismatches between package materials and carriers, leading to potential damage from solder ball pads expanding or contracting at different rates than the underlying dielectric material.
Innovation Solution
A low stress pad structure is implemented by reducing adhesion between solder ball pads and the dielectric material, either through forming a gap or using elongated openings in a seed layer, allowing the solder ball pads to expand and contract independently, thereby minimizing stress on the package and integrated circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If solder ball pads are made with thick metal layers for good adhesion, then adhesion between pad and dielectric material is improved, but stress concentration at solder joint increases due to CTE mismatch
Solution Approach 1:
The solder ball pad structure is segmented into multiple functional layers: a thick metal layer for adhesion, a dielectric layer for stress isolation, and a cap layer for protection. This segmentation allows each layer to perform its specific function without compromising the others, resolving the contradiction between adhesion strength and stress concentration.
Solution Approach 2:
A dielectric layer is introduced as an intermediary between the thick metal pad layer and the underlying substrate. This intermediary layer has a coefficient of thermal expansion (CTE) that bridges the gap between the metal pad and the substrate, reducing stress concentration while maintaining adhesion through the thick metal layer.
2Strength
If solder ball pads are made with thick metal layers, then adhesion is improved, but damage risk to underlying integrated circuit increases due to stress during thermal expansion
Solution Approach 1:
The dielectric layer serves as a stress-absorbing intermediary that protects the underlying integrated circuit from stress during thermal expansion and contraction cycles, while allowing the thick metal pad to maintain strong adhesion to the substrate.
Solution Approach 2:
The CTE of the dielectric layer is specifically selected to be between the CTE of the metal pad and the substrate, creating a gradient that gradually transitions thermal expansion properties and reduces stress transmission to the underlying circuit.
3Strength
If solder ball pads are made with thick metal layers, then adhesion is improved, but stress concentration at solder joint increases
Solution Approach 1:
The dielectric layer acts as a stress-distributing intermediary that spreads the thermal expansion stress over a larger area, reducing stress concentration at the solder joint while preserving the adhesion benefits of the thick metal layer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the risk of damage to the dielectric material and underlying integrated circuits by allowing the solder ball pads to expand and contract without causing stress, enhancing the reliability and integrity of the semiconductor package.
Implementation Method 1
stresses may be introduced due to the CTE (co-efficient of thermal expansion) mismatch between the materials of the package and a carrier
Data Source
AI summary
Embodiments are provided for package semiconductor devices, each device including: a low stress pad structure comprising: a dielectric layer, a seed layer having: a center section, and a ring section formed around the center section and over a top surface of the dielectric layer, wherein the ring section of the seed layer includes a set of elongated openings through which a portion of the top surface of the dielectric layer is exposed, and a metal layer having: an inner section formed over a top surface of the center section of the seed layer, and an outer section formed over a top surface of the ring section of the seed layer, wherein a bottom surface of the outer section of the metal layer directly contacts the portion of the top surface of the dielectric layer exposed through the set of elongated openings.