Low-Swing CMOS Input Circuit With Leveling Transistor Leakage Control
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Solution Overview
Problem
Conventional CMOS circuits experience static leakage current due to input signal swings less than the supply voltage, particularly in low-power applications, where the pull-down transistor is 'ON' and the pull-up transistor is not completely 'OFF', leading to unwanted static current.
Innovation Solution
A CMOS input circuit with a leveling circuit that controls a leveling transistor to act as a forward-biased diode-connected transistor at one logical level and a conductive path at another, reducing the gate-source voltage of the switching transistor to minimize static leakage current, utilizing a control voltage associated with the output voltage for switching elements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the input signal swing is less than the supply voltage, then the CMOS circuit can process low-swing signals, but static leakage current increases due to incomplete transistor switching
Solution Approach 1:
The patent applies dynamics by making the supply voltage to the CMOS input stage dynamic rather than fixed. A control circuit adjusts the supply voltage (VDD) based on the input signal characteristics - reducing it when the input swing is small to minimize leakage current, and restoring it when full switching is needed. This dynamic adaptation resolves the contradiction between handling low-swing signals and preventing static leakage.
Solution Approach 2:
The patent changes the supply voltage parameter dynamically based on input signal conditions. When the input signal has small swing amplitude, the supply voltage is reduced to a lower level (VDD_LOW) to ensure the pull-up transistor turns off completely, eliminating the leakage path. This parameter change strategy allows the circuit to adapt to different input signal conditions while minimizing energy loss.
2Measurement precision
If the pull-down transistor is kept ON to handle low logic levels, then the circuit can detect low-swing signals, but unwanted static current flows through both transistors
Solution Approach 1:
The patent uses dynamics by making the supply voltage variable. When detecting low logic levels, the supply voltage is maintained at a higher level to ensure proper transistor switching and accurate detection. When the input signal is stable at a logic level, the supply voltage is reduced to eliminate the leakage path, thus resolving the contradiction between detection capability and leakage prevention.
Solution Approach 2:
The patent changes the supply voltage parameter based on the operational state. During active detection phases, full supply voltage is applied for optimal transistor switching. During steady-state conditions where leakage would occur, the supply voltage is reduced to cut off the leakage path, thereby eliminating the harmful static current while maintaining detection precision.
3Reliability
If conventional CMOS circuits are used with full supply voltage, then transistors switch completely between ON and OFF states, but power consumption increases in low-power applications
Solution Approach 1:
The patent applies dynamics by implementing a dynamic supply voltage system that adapts to the actual switching needs. The control circuit monitors the input signal and adjusts the supply voltage accordingly - using full voltage only when complete switching is necessary for reliable operation, and reducing voltage during periods when leakage would occur. This dynamic approach maintains reliability while minimizing power consumption.
Solution Approach 2:
The patent changes the supply voltage parameter from a fixed value to a variable one that adapts to operational requirements. By reducing the supply voltage to VDD_LOW during conditions that cause leakage, the patent significantly reduces power consumption while maintaining reliable transistor switching when needed, thus resolving the contradiction between reliability and energy usage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces static leakage current by regulating the gate-source voltage of the switching transistor, enabling the CMOS input circuit to operate at lower supply voltages and maintain low power consumption, with a positive feedback mechanism enhancing its functionality.
Implementation Method 1
the leveling transistor is arranged as a diode-connected transistor at a first logical level of the input voltage
Implementation Method 2
arranging, under control of the second voltage, the leveling transistor (i) as a forward-biased diode-connected transistor for regulating a voltage on the source of the first switching transistor
Data Source
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AI summary
The invention relates to a CMOS input circuit for receiving low-swing input signals, which is an alternative to the CMOS input circuits as known from the prior art. The CMOS input circuit according to the invention comprises a leveling circuit (LC) that is constructed for arranging, under control of a voltage associated with an output voltage of a CMOS input stage (Inv1), a leveling transistor (M3) which is located in a supply path of the CMOS input stage (Inv1), (i) as a forward-biased diode-connected transistor for regulating the voltage on a source of the CMOS input stage (Inv1) for reducing the gate-source voltage of a switching transistor (M1, M2) in the CMOS input stage (Inv1), when an input voltage of the CMOS input circuit assumes a level associated with a first logical level causing the switching transistor (M1, M2) to be switched off, and (ii) as a conductive path when the input voltage assumes a level associated with a second logical level causing the switching transistor (M1, M2) to be switched on. The invention also relates to an Input-Output circuit, an electronic circuit and a semiconductor device comprising such CMOS input circuit. The invention provides an alternative to known CMOS input circuit that make use of a diode- connected transistor that is short-circuited in case of one of the input voltage levels. An advantageous embodiment of the invention incorporates a positive feedback mechanism that makes the circuit more suitable for low supply voltages.