Low-Swing Transmitter DCD Sampling Before Attenuation

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Solution Overview

Problem

Conventional chip-to-chip (C2C) SERDES interfaces face challenges with duty cycle distortion (DCD) due to asymmetric rise and fall times in low-swing output signals, leading to inefficiencies in data transmission and increased system complexity, particularly in High Bandwidth Memory (HBM) and High Bandwidth Interface (HBI) systems, where additional low voltage supplies are required, reducing throughput and introducing additional DCD.

Innovation Solution

A low-swing transmitter design that incorporates a high-swing output driver and a passive continuous-time linear equalization (CTLE) circuit, along with a duty cycle correction (DCC) loop that samples the signal before the attenuator, allowing for DCD estimation and correction without additional hardware, thereby eliminating the need for a dedicated low voltage supply and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If a low-swing N-over-N output driver is used to generate low swing transmit signal, then power consumption is reduced, but additional low voltage supply is required which reduces interface throughput

Engineering Contradiction:

Improvepower consumptionVSAvoidinterface throughput

Core Design Contradiction:

Use of energy by moving objectVSProductivity

Solution Approach 1:

The patent extracts the low voltage supply requirement from the system by using a high-swing output driver that operates from a single voltage rail, eliminating the need for additional low voltage bumps and thereby maintaining full interface throughput while achieving low power consumption through differential signaling

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of using a low-swing driver that requires additional voltage supplies, the patent inverts the approach by using a high-swing driver with single supply voltage, achieving low power consumption through the differential pair configuration rather than through low voltage operation

Inventive Principle:

Principle #13The other way round (Inversion)

2Shape

If a low-swing N-over-N output driver is used, then low swing transmit signal is generated, but rise and fall times are inherently different causing duty cycle distortion

Engineering Contradiction:

Improvesignal symmetryVSAvoidduty cycle distortion

Core Design Contradiction:

ShapeVSManufacturing precision

Solution Approach 1:

The patent introduces a duty cycle correction loop that samples the output signal, detects duty cycle distortion, and generates correction signals to adjust the driver operation, thereby maintaining symmetric rise and fall times and correcting DCD in real-time

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent performs preliminary duty cycle correction by sampling the signal at an intermediate node before the output attenuator and adjusting the driver output accordingly, preventing DCD from propagating to the final output signal

Inventive Principle:

Principle #10Preliminary action

3Manufacturing precision

If duty cycle correction is applied to correct DCD, then duty cycle distortion is reduced, but additional DCD is introduced degrading overall TX DCD

Engineering Contradiction:

Improveduty cycle distortionVSAvoidoverall TX DCD

Core Design Contradiction:

Manufacturing precisionVSReliability

Solution Approach 1:

The patent performs duty cycle correction at an intermediate node before the output attenuator, correcting the signal while it still has sufficient swing, thereby avoiding the introduction of additional DCD that would occur if correction were attempted on the already-attenuated low-swing signal

Inventive Principle:

Principle #10Preliminary action

4Manufacturing precision

If additional asynchronous sampling is used for DCC, then duty cycle correction is achieved, but system complexity increases

Engineering Contradiction:

Improveduty cycle correctionVSAvoidsystem complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent uses the existing sampling clock and existing signal paths for both data transmission and duty cycle correction functions, making the sampling circuit multi-functional and thereby achieving DCD correction without increasing system complexity

Inventive Principle:

Principle #6Universality (Multi-functionality)

5Measurement precision

If loopback between transmitter and receiver is used for DCD estimation, then DCD measurement is achieved, but time to achieve good resolution is increased

Engineering Contradiction:

ImproveDCD measurementVSAvoidtime to achieve resolution

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent performs DCD estimation in advance by sampling the signal at an intermediate node where the signal characteristics are still well-defined and have sufficient swing, achieving accurate measurement without requiring time-consuming loopback procedures

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS20240056059A1Duty cycle distortion (DCD) sampling in a low-swing transmitter

Publication Date: 2024.02.15 MELLANOX TECHNOLOGIES LTD(IL)

AI summary

Technologies for jitter extraction are described. A receiver device includes an analog-to-digital converter (ADC) and a signal processing circuit. The signal processing circuit includes an equalizer block to output current data based on samples from the ADC. A clock-recovery (CR) block includes a timing error detector (TED) or a phase detector to measure a sampling offset. The CR block can use the sampling offset to control sampling of subsequent data by the ADC. A jitter extraction block can use the sampling offset to re-sample the current data to obtain re-sampled data based on the sampling offset to remove jitter from the current data.