Low-Temperature Epitaxial Layer Formation via Pressure and Temperature Control

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Solution Overview

Problem

The existing selective epitaxial layer formation processes for semiconductor devices are limited by high temperatures (750° C. to 850° C.) and pressure conditions, leading to non-uniform growth rates and potential damage to epitaxial layers due to hydrogen bonding with substrate dangling bonds, which affects the suppression of short channel effects in MOS transistors.

Innovation Solution

A method for forming epitaxial layers at a low temperature of 700° C. or less, using a silicon gas and purge gas sequence within an epitaxial chamber at pressures of 300 Torr or less, with multiple cycles of epitaxial layer formation and purging to prevent damage and enhance uniformity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If LPCVD SEG process is performed at high temperature (750°C to 850°C), then epitaxial layer formation is achieved, but short channel effect suppression is limited

Engineering Contradiction:
Improveshort channel effect suppressionVSAvoidepitaxial layer formation temperature
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent changes the temperature parameter from conventional high temperature (750-850°C) to low temperature (400-700°C) range, and adjusts pressure parameter to 300-760 Torr to achieve both good epitaxial layer formation and short channel effect suppression in highly integrated semiconductor devices

Inventive Principle:
Principle #35Parameter changes

2Manufacturing precision

If LPCVD SEG process is performed at pressure of 10 Torr to 20 Torr, then chemical vapor deposition occurs, but growth rate and selective etch rate become non-uniform

Engineering Contradiction:
Improvegrowth rate uniformityVSAvoidepitaxial layer growth rate
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent changes the pressure parameter from low pressure (10-20 Torr) to medium pressure (300-760 Torr) range, which increases the mean free path of thermally decomposed atoms, thereby achieving uniform growth rate and selective etch rate across all semiconductor substrates in the reactor

Inventive Principle:
Principle #35Parameter changes

3Manufacturing precision

If carrier gas (hydrogen gas) is injected at high flow rate of 20,000 sccm or more, then sufficient gas supply is achieved, but hydrogen atoms bond to dangling bonds and deteriorate growth rate and uniformity

Engineering Contradiction:
Improvegrowth rate uniformityVSAvoidepitaxial layer growth rate
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The patent changes the carrier gas flow rate parameter from high flow rate (20,000 sccm or more) to reduced flow rate, which decreases the concentration of hydrogen atoms that would otherwise bond to dangling bonds on the substrate surface, thereby improving both growth rate and uniformity

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for the formation of epitaxial layers with increased critical thickness and improved uniformity, reducing the risk of amorphous silicon formation and enhancing the manufacturing yield of semiconductor devices.

Implementation Method 1

heating the substrate at a temperature of about 700° C. or less

Methodology Applied
Scientific EffectHeating: Heating

Implementation Method 2

performing an epitaxial process on the substrate to form an epitaxial layer on the substrate

Methodology Applied
Scientific EffectChemical Vapour Deposition: Chemical Vapour Deposition

Implementation Method 3

atoms thermally decomposed from a semiconductor source gas

Methodology Applied
Scientific EffectThermal decomposition: Pyrolysis

Implementation Method 4

injecting a purge gas into the epitaxial chamber to perform first purge inside the epitaxial chamber

Methodology Applied
Scientific EffectPurging:

Data Source

PatentUS10796915B2Method for forming epitaxial layer at low temperature
Publication Date: 2020.10.06 EUGENE TECH CO LTD
  • US10796915B2 patent drawing
  • US10796915B2 patent drawing
  • US10796915B2 patent drawing

AI summary

Provided is a method for forming an epitaxial layer at a low temperature. The method for forming the epitaxial layer includes transferring a substrate into an epitaxial chamber and performing an epitaxial process on the substrate to form an epitaxial layer on the substrate. The epitaxial process includes heating the substrate at a temperature of about 700° C. or less and injecting a silicon gas into the epitaxial chamber in a state in which the inside of the epitaxial chamber is adjusted to a pressure of about 300 Torr or less to form a first epitaxial layer, stopping the injection of the silicon gas and injecting a purge gas into the epitaxial chamber to perform first purge inside the epitaxial chamber, heating the substrate at a temperature of about 700° C. or less and injecting the silicon gas into the epitaxial chamber in the state in which the inside of the epitaxial chamber is adjusted to a pressure of about 300 Torr or less to form a second epitaxial layer, and stopping the injection of the silicon gas and injecting the purge gas into the epitaxial chamber to perform second purge inside the epitaxial chamber.