Low Temperature Ion Implantation for Shallow Junctions
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Solution Overview
Problem
Conventional ion implantation processes for semiconductor manufacturing result in structural damage and defects, leading to deeper dopant profiles, reduced dopant activation, and increased junction leakage due to high temperatures and residual interstitials, which hinder the creation of abrupt and shallow junctions necessary for miniaturized semiconductor devices.
Innovation Solution
Performing ion implantation at low temperatures (below 273° K) followed by fast annealing processes like laser or FLASH anneal to minimize substrate damage and enhance dopant activation, allowing for higher throughput and reduced manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional high-temperature ion implantation is used, then dopant activation is achieved, but structural damage and defects increase leading to deeper dopant profiles and reduced manufacturing precision
Solution Approach 1:
The patent changes the temperature parameter from conventional high temperatures to low temperatures (below 273 K or -4°C) during ion implantation. This parameter change reduces structural damage and prevents excessive dopant diffusion, enabling precise control of junction depth while maintaining dopant activation through subsequent fast annealing processes.
Solution Approach 2:
The patent performs low-temperature ion implantation as a preliminary action before fast annealing. The low-temperature implantation deposits dopants with minimal structural damage and controlled diffusion, preparing the substrate for subsequent fast annealing that activates the dopants without causing excessive diffusion or damage.
2Productivity
If conventional annealing processes are used, then dopant activation is achieved, but manufacturing time and cost increase
Solution Approach 1:
The patent uses fast annealing processes that rapidly heat and cool the substrate, skipping the long, gradual heating and cooling cycles of conventional annealing. This rushing through the annealing process achieves dopant activation in much shorter time, increasing throughput and reducing manufacturing time and cost.
3Manufacturing precision
If thin amorphous layer is used, then implantation depth is reduced, but interstitials remain causing transient enhanced diffusion and junction leakage
Solution Approach 1:
The patent changes the temperature parameter to low temperatures during ion implantation, which modifies the behavior of interstitials and prevents transient enhanced diffusion. This parameter change allows thin amorphous layers to be used while maintaining junction abruptness and preventing junction leakage through reduced interstitial-mediated diffusion.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Low-temperature ion implantation reduces structural damage, enables precise control of junction depth and dopant profiles, increases dopant activation, and significantly improves device performance by reducing leakage and external resistance, while enabling faster and more cost-effective annealing processes.
Implementation Method 1
Ion implantation is one of several processes performed for manufacturing semiconductor devices. An ion implanter includes an ion source for converting a gas or a solid material into a well-defined ion beam. The ion beam typically is mass analyzed to eliminate undesired ion species, accelerated to a desired energy, and implanted into a target.
Implementation Method 2
The implantation of the source and drain regions of a semiconductor device are performed at low temperatures, such as below 273° K. This low temperature implant reduces the structural damage caused by the impacting ions.
Implementation Method 3
Subsequently, the implanted substrate is activated using fast forms of annealing. By performing the implant at low temperatures, the damage to the substrate is reduced, thereby allowing a fast anneal to be used to activate the dopants, while eliminating the majority of the defects and damage.
Data Source
AI summary
A method of processing to a substrate while minimizing cost and manufacturing time is disclosed. The implantation of the source and drain regions of a semiconductor device are performed at low temperatures, such as below 273° K. This low temperature implant reduces the structural damage caused by the impacting ions. Subsequently, the implanted substrate is activated using faster forms of annealing. By performing the implant at low temperatures, the damage to the substrate is reduced, thereby allowing a fast anneal to be used to activate the dopants, while eliminating the majority of the defects and damage. Fast annealing is less expensive than conventional furnace annealing, and can achieve higher throughput at lower costs.