Low-Voltage Reference Current Circuit With Leakage Compensation

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Solution Overview

Problem

Current reference circuits face challenges in operating effectively at low supply voltages, experiencing issues with current leakage, low output resistance, and noise requirements, which affect the performance of current mirrors and require complex circuit designs.

Innovation Solution

The proposed integrated current reference circuit includes a voltage offset circuit with p-channel and n-channel transistors, resistors, and capacitors, operating within specific voltage ranges to maintain low noise and accuracy, using IO devices to reduce current leakage and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by stationary object

If a reference current is generated from a low supply voltage, then the silicon area and power consumption are reduced, but the current leakage and output resistance deteriorate

Engineering Contradiction:
Improvepower consumptionVSAvoidcurrent leakage
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

The circuit is divided into two distinct voltage domains: a first voltage domain (0.9V-1.0V) for the p-channel transistors and a second voltage domain (0.6V) for the n-channel transistor. This segmentation allows each domain to be optimized independently, with the first domain providing stable reference current and the second domain compensating for leakage effects through the voltage offset circuit.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The n-channel transistor acts as an intermediary element between the reference current path and the voltage offset circuit. It receives the reference current from the first voltage domain and generates a compensated voltage signal that accounts for leakage effects, thereby improving overall circuit reliability without increasing power consumption.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Object-affected harmful factors

If filter capacitors are added to reduce noise, then the noise performance is improved, but the voltage shift in the current mirror circuit increases due to gate leakage current

Engineering Contradiction:
ImprovenoiseVSAvoidvoltage shift
Core Design Contradiction:
Object-affected harmful factorsVSMeasurement precision

Solution Approach 1:

The gate leakage current that would normally cause harmful voltage shifts is instead utilized as a useful signal. The n-channel transistor converts this leakage current into a compensating voltage offset that is fed back to the p-channel transistor gates, thereby canceling out the adverse effects and improving overall circuit accuracy.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Use of energy by stationary object

If the supply voltage is reduced, then the power consumption decreases, but the current mirror performance is significantly affected by current leakage

Engineering Contradiction:
Improvepower consumptionVSAvoidcurrent mirror performance
Core Design Contradiction:
Use of energy by stationary objectVSReliability

Solution Approach 1:

A feedback mechanism is implemented where the n-channel transistor continuously monitors the reference current and generates a compensating voltage offset. This offset is fed back to the gates of the p-channel transistors, creating a closed-loop system that actively compensates for leakage effects and maintains current mirror performance at low voltages.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3593220B1Low-voltage reference current circuit
Publication Date: 2021.04.28 SHENZHEN GOODIX TECH CO LTD
  • EP3593220B1 patent drawingFigure 1~2
  • EP3593220B1 patent drawingFigure 3A~3B
  • EP3593220B1 patent drawingFigure 4~5

AI summary

A current reference circuit includes a current source, a first p-channel metal oxide semiconductor (PMOS) transistor having a source coupled to a first supply voltage, a gate, and a drain coupled to the current source, and an n-channel MOS (NMOS) transistor having a drain coupled to a second supply voltage, a gate coupled to the drain of the first PMOS transistor. The current reference circuit also includes a first resistive element having a first terminal coupled to a source of the NMOS transistor and a gate of the first PMOS transistor and a second terminal coupled to a ground potential, a second PMOS transistor having a drain coupled to the first supply voltage, and a second resistive element having a first terminal coupled to the first terminal of the first resistive element and a second terminal coupled to the gate of the second PMOS transistor.