Low Voltage Drive Circuit Digital-to-Digital Conversion

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Solution Overview

Problem

Current data communication systems face challenges in efficiently transmitting digital data over low voltage signals with minimal power consumption and high noise immunity, particularly in environments where data errors are prevalent.

Innovation Solution

The implementation of Low Voltage Drive Circuits (LVDCs) that convert digital data into analog signals with oscillating components of low magnitude, allowing for low power, high data rate communication with improved noise immunity, and enable full duplex or half duplex data transfer using multiple frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If digital data is transmitted using conventional voltage levels, then data communication reliability is maintained, but power consumption increases and noise immunity decreases

Engineering Contradiction:
Improvenoise immunityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent changes the voltage parameter from conventional levels (e.g., 3.3V, 5V) to low voltage levels (e.g., 1.8V or lower) while implementing compensation mechanisms through digital signal processing and error correction codes to maintain reliability and noise immunity at the lower voltage levels

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent segments the data transmission process into multiple stages including encoding, modulation, transmission, demodulation, and decoding, with error correction capabilities distributed across these stages to maintain reliability while using low voltage signals

Inventive Principle:
Principle #1Segmentation

2Use of energy by moving object

If low voltage signals are used for data transmission, then power consumption decreases, but signal integrity and noise immunity deteriorate

Engineering Contradiction:
Improvepower consumptionVSAvoidnoise interference
Core Design Contradiction:
Use of energy by moving objectVSObject-affected harmful factors

Solution Approach 1:

The patent applies error correction codes and redundancy mechanisms before transmission to cushion against potential noise interference, allowing the receiver to correct errors that occur during low voltage transmission without compromising data integrity

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The patent implements feedback mechanisms where the receiver detects errors in received signals and requests retransmission or applies correction algorithms, enabling the system to overcome noise interference that affects low voltage signals

Inventive Principle:
Principle #23Feedback

3Productivity

If digital data is converted to analog signals for transmission, then data rate increases, but circuit complexity increases

Engineering Contradiction:
Improvedata rateVSAvoidcircuit complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts only the essential modulation functionality needed for low voltage transmission, implementing simplified analog signal generation that converts digital data to analog form with minimal additional circuitry, focusing on the core conversion function rather than full-featured signal processing

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS11153143B2Low voltage drive circuit with digital to digital conversion and methods for use therewith
Publication Date: 2021.10.19 SIGMASENSE LLC
  • US11153143B2 patent drawing
  • US11153143B2 patent drawing
  • US11153143B2 patent drawing

AI summary

A low voltage drive circuit (LVDC) includes a digital to digital converter that converts transmit digital data into a digital input signal, wherein the transmit digital data is synchronized to a clock rate of a host device and the digital input signal is synchronized to a clock rate of a bus to which the LVDC is coupled. An output limited digital to analog is converter converts the digital input signal into analog outbound data by generating a DC component and converting the digital input signal into an oscillating component at a first frequency, wherein magnitude of the oscillating component is limited to a range that is less than a difference between magnitudes of power supply rails of the LVDS, and wherein the oscillating component and the DC component are combined to produce the analog outbound data. A drive sense circuit conveys the analog outbound data as variances in loading of the bus at the first frequency and wherein analog inbound data is represented within an analog receive signal as variances in loading of the bus at a second frequency.