Low Voltage Memory Data Path Using Current Blocking
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As feature sizes in transistors shrink, they can only withstand limited voltage, necessitating lower voltage operation to reduce power consumption while maintaining speed and efficiency in memory data paths.
Innovation Solution
The implementation of a data path circuit using NOR gates, N channel transistors, and P channel transistors in series, where P channel transistors are made non-conductive to block current flow, allowing N channel transistors to flip states effectively at reduced voltage, thereby enhancing speed and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by stationary object
If lower voltage operation is used to reduce power consumption, then power consumption is reduced, but speed of operation may be adversely impacted
Solution Approach 1:
The data path is segmented into multiple stages with different voltage requirements. The first data path operates at a first voltage level while the second data path operates at a second voltage level, allowing each segment to optimize for its specific function rather than requiring the entire path to operate at the lowest possible voltage
Solution Approach 2:
The patent implements dynamic voltage switching where the voltage level of the data path can be changed based on operational requirements. The controller can switch between first and second voltage levels for different data paths, enabling the system to adapt voltage dynamically to balance between power consumption and speed requirements
2Speed
If transistors with reduced feature sizes are used, then speed of operation is improved and power consumption is reduced, but voltage withstanding capability is limited
Solution Approach 1:
The patent changes the voltage parameter dynamically based on the operational mode and data path location. By switching between different voltage levels (first voltage and second voltage) for different data paths, the system allows reduced feature size transistors to operate at lower voltages where they can withstand the reduced voltage while still achieving high speed and low power consumption benefits
3Use of energy by stationary object
If P channel transistors are made non-conductive to block current flow, then N channel transistors can flip states effectively at reduced voltage, but current blocking may impact signal strength
Solution Approach 1:
The patent uses P channel transistors as intermediary elements that selectively block current flow between different data paths. These intermediary transistors can be turned off (made non-conductive) to isolate and protect signal paths, allowing N channel transistors to operate effectively at reduced voltages while maintaining signal integrity through proper isolation
Data Source
AI summary
A data path of a memory is from an array of the memory, through a sense amplifier, through NOR gates, through N channel transistors, and through a latch that provides an output. The sense amplifier provides complementary data to the NOR gates which provide an output to the N channel transistors. The NOR gates provide outputs to the latch. This has the affect of providing outputs to gates of one inverter and drains of another inverter. Additional P channel transistors are in series with the inverters of the latch. The P channel transistor that is in series with the inverters whose drains are receiving the signal is made to be nonconductive by the output of the NOR gate to block current flow to the N channel transistor that is providing the input to the latch. The blocking of the current reduces the amount of current that the N channel transistor has to sink. This enables the N channel transistor, even at a reduced voltage, to be sufficiently conductive to flip the state of the latch.