Low-Voltage Sense Amplifier for High-Voltage Memory Programming
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Solution Overview
Problem
Sense amplifiers in non-volatile memories using state-programmable memory elements require high-voltage transistors to handle the full read voltage, leading to inefficiencies in power consumption and real-estate usage due to the destructive nature of read operations.
Innovation Solution
A sense amplifier design using low-voltage transistors with a dual-stage, differential cascode configuration that dynamically adjusts supply and intermediate voltages to handle programming voltages higher than VDD without exposing transistors to the full operational voltage, ensuring write-reliability and efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-voltage transistors are used in the sense amplifier to handle the full read voltage, then the sense amplifier can handle the voltage swing without damage, but power consumption increases and chip area increases
Solution Approach 1:
The sense amplifier is divided into two distinct stages: a first stage that handles the high voltage swing during read operations using high-voltage transistors, and a second stage that operates at lower voltages using low-voltage transistors. This segmentation allows each stage to be optimized for its specific voltage range, reducing overall power consumption while maintaining the ability to handle high voltage swings.
Solution Approach 2:
A voltage translation mechanism acts as an intermediary between the high-voltage first stage and the low-voltage second stage. This intermediary circuit translates the high voltage signals from the first stage to compatible low voltage levels for the second stage, enabling the sense amplifier to handle high voltage swings without requiring all transistors to operate at high voltages.
2Reliability
If high-voltage transistors are used in the sense amplifier to handle the full read voltage, then the sense amplifier can handle the voltage swing without damage, but the chip area increases
Solution Approach 1:
The sense amplifier is divided into two distinct stages: a first stage that handles the high voltage swing during read operations using high-voltage transistors, and a second stage that operates at lower voltages using low-voltage transistors. This segmentation allows each stage to be optimized for its specific voltage range, reducing overall power consumption while maintaining the ability to handle high voltage swings.
Solution Approach 2:
A voltage translation mechanism acts as an intermediary between the high-voltage first stage and the low-voltage second stage. This intermediary circuit translates the high voltage signals from the first stage to compatible low voltage levels for the second stage, enabling the sense amplifier to handle high voltage swings without requiring all transistors to operate at high voltages.
3Measurement precision
If the read operation is destructive and requires write-back, then the read state can be accurately determined, but the sense amplifier is exposed to full read voltage multiple times increasing power consumption
Solution Approach 1:
The sense amplifier is divided into two distinct stages: a first stage that handles the high voltage swing during read operations using high-voltage transistors, and a second stage that operates at lower voltages using low-voltage transistors. This segmentation allows each stage to be optimized for its specific voltage range, reducing overall power consumption while maintaining the ability to handle high voltage swings.
Solution Approach 2:
A voltage translation mechanism acts as an intermediary between the high-voltage first stage and the low-voltage second stage. This intermediary circuit translates the high voltage signals from the first stage to compatible low voltage levels for the second stage, enabling the sense amplifier to handle high voltage swings without requiring all transistors to operate at high voltages.
Data Source
AI summary
Disclosed herein are devices, methods, and systems for operating a sense amplifier comprising a plurality of transistors connected in a cascode configuration. The plurality of transistors are configured to sense, in a read operation mode, a switching signal from the state-programmable memory element, and to apply, in a write operation mode, a programming voltage level to the state-programmable memory element. The plurality of transistors are configured to receive a supply voltage at, in the read operation mode, a first supply voltage level that is lower than the programming voltage level and at, in the write operation mode, the programming voltage level, and to operate the sense amplifier in the read operation mode and the write operation mode with no more than a maximum operational voltage level across each of the plurality of transistors that is less than the programming voltage level.


