Low-Voltage Reset Circuit Using Standard-Cell Threshold Detection
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Solution Overview
Problem
Existing display devices face issues with resetting when supplied with excessively small power voltage, requiring a reference voltage setup to detect low voltage.
Innovation Solution
A reset circuit and timing controller that includes a low voltage detecting circuit with standard cells configured to detect low voltage using a threshold voltage based on fabrication schedule variance, comprising a first cell, one or more second cells for delay, and a third cell to output a low voltage reset signal only when all inputs are logic '1' for a predetermined delay time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a reference voltage is used to detect low voltage, then low voltage detection accuracy is improved, but device complexity increases due to additional reference voltage setup
Solution Approach 1:
The standard cell uses its own threshold voltage characteristic to detect low voltage conditions. The cell's inherent threshold voltage serves as the detection reference, eliminating the need for external reference voltage circuits. When the power supply voltage drops below the threshold voltage, the cell's output naturally changes state, providing self-service low voltage detection.
Solution Approach 2:
The patent extracts the detection function from a separate reference voltage circuit and integrates it into the standard cell itself. By removing the external reference voltage setup and using only the standard cell's inherent threshold voltage characteristic, the design simplifies the overall device while maintaining detection accuracy.
2Ease of manufacture
If standard cells are used for low voltage detection, then ease of manufacture is improved, but measurement precision may worsen due to fabrication variance
Solution Approach 1:
The patent changes the detection parameter from an externally set reference voltage to the standard cell's inherent threshold voltage. This parameter change allows the use of standard cells with fabrication variance, as each cell's threshold voltage becomes its own reference point. The delay circuit compensates for timing variations, ensuring reliable detection despite parameter variations in standard cells.
3Reliability
If delay time is extended to account for power signal input time, then reliability of reset timing is improved, but loss of time increases
Solution Approach 1:
The delay circuit is configured to account for the power signal input time in advance. By pre-calculating and compensating for the time required for the power signal to be input and stabilized, the reset circuit triggers at the correct moment without unnecessary delays. This preliminary timing adjustment ensures reliable reset timing while minimizing time loss.
Data Source
AI summary
Disclosed is a reset circuit including a low voltage detecting circuit receiving a power signal and outputting a signal, the low voltage detecting circuit including a first cell configured to receive the power signal and output the voltage corresponding to the logic “0” based on the power signal being smaller than a threshold voltage or a voltage corresponding to logic “1” based on the power signal being greater than the threshold voltage, at least one second cell connected in series to the first cell and outputting a signal inputted from the first cell after delaying the signal for a predetermined delay time, and a third cell outputting a low voltage reset signal by receiving all signals outputted from the first cell and the at least one second cell.