Low Voltage Sensing Scheme With Clamping Diodes For Standby Current Reduction

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Solution Overview

Problem

Existing memory devices with low threshold voltage sense amplifiers experience increased standby current during active power down mode, which is not effectively reduced by prior methods without complex modifications or data loss prevention measures.

Innovation Solution

A low voltage sensing scheme using voltage clamping devices connected to sense amplifier control lines, reducing leakage current by adjusting voltage levels during power down mode without significant modifications to the sense amplifier layout or complex data loss prevention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If low threshold voltage sense amplifiers are used to enable low voltage sensing, then sensing capability is improved, but standby current during active power down mode increases

Engineering Contradiction:
Improvesensing capabilityVSAvoidstandby current
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent applies parameter changes by dynamically adjusting the voltage level on the sense amplifier control line based on the power mode. During active power down mode, the control line voltage is reduced from the normal high level to a lower level, which decreases the standby current of the low threshold voltage sense amplifiers while maintaining their low voltage sensing capability when needed

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent implements dynamics by making the sense amplifier control line voltage adjustable and time-dependent rather than fixed. The control line voltage transitions between different levels based on operational mode, allowing the system to optimize between sensing performance and power consumption dynamically

Inventive Principle:
Principle #15Dynamics

2Loss of energy

If voltage levels are adjusted to reduce standby current, then power consumption is reduced, but data integrity may be compromised

Engineering Contradiction:
Improvepower consumptionVSAvoiddata integrity
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent applies preliminary anti-action by proactively managing the control line voltage to prevent data loss before it can occur. The control line is driven to appropriate voltage levels based on operational mode, and refresh operations are performed when needed, preventing data integrity issues rather than correcting them after they occur

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent implements feedback mechanisms to monitor and maintain data integrity while managing power consumption. The system responds to operational conditions by adjusting control line voltages and performing refresh operations when necessary, ensuring data integrity is maintained while optimizing power consumption

Inventive Principle:
Principle #23Feedback

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The scheme effectively reduces active power down standby leakage current, maintaining data integrity and reducing overall power consumption without complex data loss prevention measures.

Implementation Method 1

A low voltage sensing scheme using voltage clamping devices connected to sense amplifier control lines, reducing leakage current by adjusting voltage levels during power down mode

Methodology Applied
Scientific EffectVoltage clamping: Diode

Data Source

PatentUS7872923B2Low voltage sensing scheme having reduced active power down standby current
Publication Date: 2011.01.18 MICRON TECHNOLOGY INC
  • US7872923B2 patent drawing
  • US7872923B2 patent drawing
  • US7872923B2 patent drawing

AI summary

A low voltage sensing scheme reduces active power down standby leakage current in a memory device. During memory's active power down state, the leak current may increase because of the use of P and Nsense amplifiers having low threshold voltages (Vth) for low Vcc sensing of data signals. A clamping device or diode is used between a Psense amplifier control line (e.g. ACT) and Vcc and/or between an Nsense amplifier control line (e.g. RNL*) and Vss (ground potential). The clamping diode is not enabled during normal memory operations, but is turned on during active power down mode to reduce leakage current through ACT and/or RNL* nodes. The clamping device connected to the ACT node may reduce the voltage on the ACT line during power down mode, whereas the clamping device connected to the RNL* node may increase the voltage on the RNL* line during power down mode to reduce sense amplifier leakage current through these nodes. Because of the rules governing abstracts, this abstract should not be used to construe the claims.