Lower Conductive Layer Etching Stopper for 3D Memory Wiring Integrity
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Solution Overview
Problem
In the formation process of three-dimensional non-volatile memory cell arrays, dust contamination leads to unintended hole patterns that can reach lower-layer wiring, causing oxidation and cracking due to thermal processes, which is difficult to prevent with existing technologies.
Innovation Solution
A semiconductor storage device design that includes a lower conductive layer made of a metal compound or polycrystal silicon, positioned between the stacked body and lower-layer wiring, acting as an etching stopper to prevent dust-induced hole patterns from reaching the wiring, thereby preventing oxidation and cracking.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If dust is attached on the stacked body during memory hole formation, then unintentional hole patterns are formed deep like memory holes, but this causes metal oxidation and cracking in lower-layer wiring during thermal processes
Solution Approach 1:
A lower conductive layer is introduced as an intermediary between the memory cell array and the lower-layer wiring. This intermediate layer acts as a barrier that stops unintended hole patterns caused by dust from reaching the lower-layer wiring, thereby preventing metal oxidation and cracking while allowing the memory hole formation process to proceed
Solution Approach 2:
The lower conductive layer is formed in advance before the memory hole formation process. This pre-formed layer serves as a protective cushion that prevents harmful effects (metal oxidation and cracking) from occurring during subsequent thermal processes, even when dust contamination occurs
2Device complexity
If no protective layer is provided, then the structure is simpler, but dust-induced hole patterns can reach lower-layer wiring causing oxidation and cracking
Solution Approach 1:
The lower conductive layer serves as a mediating structure between the memory cell array and lower-layer wiring. While it adds one more layer to the device structure, it provides essential protection against dust-induced damage, achieving a reasonable balance between complexity and reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The lower conductive layer effectively blocks unintended hole patterns caused by dust, preventing metal oxidation and cracking of lower-layer wiring during thermal processes, ensuring the integrity of the semiconductor storage device.
Implementation Method 1
a lower conductive layer which is provided between the stacked body and lower-layer wiring, and between a peripheral region of the stacked body and the lower-layer wiring
Data Source
AI summary
A semiconductor storage device includes a base portion, a stacked body, and a first column. The base portion includes a substrate, a semiconductor element on the substrate, lower-layer wiring above the semiconductor element, and a first conductive layer above the lower-layer wiring and made of a metal compound or polycrystal silicon. The stacked body is above the first conductive layer. The stacked body includes second conductive layers and insulating films stacked alternately. The first column includes a semiconductor body and a memory film. The semiconductor body extends in a stacked direction of the stacked body and is electrically connected to the first conductive layer. A memory film has a charge trap between the plurality of second conductive layers and the semiconductor body. The first conductive layer is provided between the stacked body and the lower-layer wiring, and between a peripheral region of the stacked body and the lower-layer wiring.