Lower Level Processor Link Holding for Fibre Channel Recovery
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Solution Overview
Problem
In Fibre Channel networks, link transitions from online to offline states or failures can lead to lost link transitions and improper management, especially when new I/O requests are received during recovery, making it difficult to manage multiple link transitions and resulting in time-consuming and error-prone processes.
Innovation Solution
A lower level processor holds the link in a failed or offline state until authorization is received from an upper level processor, preventing link transitions and allowing for coordinated link recovery, by transmitting IDLE or Offline Sequence orders in Fibre Channel to manage the link until recovery actions are completed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the lower level processor automatically initiates link recovery without authorization, then link recovery speed is improved, but link stability deteriorates due to uncoordinated transitions and potential conflicts with upper level processing
Solution Approach 1:
The lower level processor performs preliminary actions by holding the link in the failed state and preparing for coordinated recovery. The link is held in the failed state until the upper level processor is ready to authorize recovery, ensuring that recovery actions are taken in a coordinated manner rather than automatically, preventing conflicts with upper level processing.
Solution Approach 2:
The system implements feedback by requiring authorization from the upper level processor before initiating link recovery. The lower level processor transmits commands to the upper level processor indicating the link down condition and waits for authorization, creating a feedback loop that ensures coordinated link recovery and prevents unstable transitions.
2Reliability
If the link is held in failed state until authorization, then link stability is improved through coordinated recovery, but processing time increases due to waiting for upper level processor authorization
Solution Approach 1:
The lower level processor implements feedback by continuously monitoring link status and waiting for authorization from the upper level processor. The processor transmits commands indicating the link down condition and holds the link in the failed state until authorization is received, ensuring coordinated recovery while minimizing unnecessary delays.
3Productivity
If multiple link transitions occur simultaneously with new I/O requests, then system responsiveness is improved, but link management complexity increases leading to lost transitions and errors
Solution Approach 1:
The lower level processor performs preliminary actions by holding the link in the failed state before initiating recovery. This preliminary holding action ensures that link recovery is coordinated with upper level processing and prevents simultaneous transitions with new I/O requests, simplifying link management while maintaining system responsiveness.
Solution Approach 2:
The system uses feedback mechanisms where the lower level processor waits for authorization from the upper level processor before initiating link recovery. This feedback loop ensures that link transitions are coordinated and do not conflict with new I/O requests, reducing link management complexity and preventing lost transitions.
Data Source
AI summary
A lower level processor holds a link, in response to detecting a link down condition of the link. In response to the holding of the link, the lower level processor transmits a command to an upper level processor indicating the link down condition of the link. The lower level processor initiates a process of link recovery for the link, in response to receiving an authorization from the upper level processor.