Lower Receiving Pin Arrangement Method and Return Mechanism

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Solution Overview

Problem

The existing lower receiving pin arrangement methods face challenges in high-precision placement and efficient transfer due to interference issues when pins are placed at arbitrary locations on a lower receiving base, leading to increased equipment costs and productivity losses.

Innovation Solution

A method involving a combination of transfer operations along orthogonal directions to position and return lower receiving pins at arbitrary locations on a lower receiving base, using temporary placement areas to prevent pin interference, with specific sequences and operations to ensure efficient arrangement and return.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If lower receiving pins are placed at arbitrary locations on the lower receiving base to achieve high-precision arrangement, then manufacturing precision is improved, but pin interference during transfer operations occurs

Engineering Contradiction:
Improvepin arrangement precisionVSAvoidpin interference
Core Design Contradiction:
Manufacturing precisionVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary action by setting temporary placement areas in advance where pins are temporarily positioned before final arrangement. This pre-planned intermediate storage allows pins to be transferred without interference while achieving precise arbitrary positioning, as the temporary areas are predetermined to avoid collision paths during transfer operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the pin transfer process into multiple stages: first transferring pins to temporary placement areas, then from temporary areas to final arbitrary positions. This segmentation separates the transfer path from the final position, allowing interference-free transfer while achieving high-precision arbitrary placement.

Inventive Principle:
Principle #1Segmentation

2Object-affected harmful factors

If elevation stroke is increased to prevent pin interference during transfer, then pin interference is prevented, but equipment cost increases

Engineering Contradiction:
Improvepin interference preventionVSAvoidequipment cost
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent introduces a spatial dimension solution by creating temporary placement areas at different locations on the lower receiving base. Instead of increasing vertical elevation stroke, the system uses horizontal spatial separation through temporary areas to avoid pin interference, thereby preventing the need for increased equipment stroke and associated cost increases.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Object-affected harmful factors

If elevation stroke is increased to prevent pin interference, then pin interference is prevented, but operation time increases and productivity decreases

Engineering Contradiction:
Improvepin interference preventionVSAvoidpin arrangement efficiency
Core Design Contradiction:
Object-affected harmful factorsVSProductivity

Solution Approach 1:

By preliminarily designating temporary placement areas and pre-planning transfer sequences, the system avoids interference without requiring additional elevation movements. This preliminary arrangement optimization maintains efficient operation time while preventing pin interference, thus preserving productivity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent enables continuous pin transfer operations by using temporary placement areas that allow seamless transitions between pins. The transfer process maintains continuous useful action without interruptions for additional elevation strokes or repositioning, thereby preventing productivity loss while avoiding interference.

Inventive Principle:
Principle #20Continuity of useful action

4Ease of operation

If lattice pattern pin attachment holes are used in the lower receiving base, then pin transfer is simple, but arrangement flexibility is restricted

Engineering Contradiction:
Improvepin transfer simplicityVSAvoidpin arrangement flexibility
Core Design Contradiction:
Ease of operationVSAdaptability or versatility

Solution Approach 1:

The patent segments the pin arrangement system into two functional parts: lattice-patterned temporary placement areas for simple transfer operations, and arbitrary final positions for flexible arrangement. This segmentation allows the system to enjoy the simplicity of lattice-based transfer while achieving the flexibility of arbitrary positioning through the two-stage process.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The lower receiving base is designed with multi-functionality, serving both as a platform for lattice-patterned temporary placement (for simple transfer) and as a destination for arbitrary pin positions (for flexible arrangement). This universal design allows the same base structure to support both operational simplicity and arrangement versatility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9497895B2Lower receiving pin arrangement method and lower receiving pin return method
Publication Date: 2016.11.15 PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
  • US9497895B2 patent drawing
  • US9497895B2 patent drawing
  • US9497895B2 patent drawing

AI summary

A pre-array temporary placement area A2 and a post-return temporary placement area A3 are set along with a lower receiving area A1. Temporary placement positions TP for lower receiving pins 22 in the pre-array temporary placement area A2 and the post-return temporary placement area A3 are previously assigned in consideration of requirements for preventing occurrence of interference between the lower receiving pins 22, which would otherwise occur during transfer of the lower receiving pins 22, and in accordance with array positions AP of the lower receiving pins 22 in the lower receiving area A1. Further, a transfer sequence is set in accordance with array positions AP.