Low-k Dielectric Film Wiring Trench Depth Control
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Solution Overview
Problem
Current manufacturing methods for semiconductor devices with multi-layered wiring structures face challenges in precisely controlling the depth of wiring trench patterns and preventing damage to the wiring trench patterns during the etching process, leading to variations in electrical characteristics and reliability issues.
Innovation Solution
A manufacturing method involving the use of a diffusion preventing film, multiple low dielectric constant films, and a multi-layered resist mask to form a precise wiring trench pattern, where the third low dielectric constant film serves as a protective layer to prevent damage during etching and ashing processes, allowing for accurate control of the wiring trench depth and reducing variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Low-k material is used to reduce RC delay, then the dielectric constant is reduced, but the resistance to chemical or plasma processes deteriorates
Solution Approach 1:
A protective film is formed over the Low-k material before etching or ashing processes. This protective film serves as a shield that prevents direct exposure of the Low-k material to harmful chemicals or plasma, thereby maintaining its integrity and low dielectric constant properties throughout the manufacturing process.
Solution Approach 2:
The protective film acts as an intermediary layer between the Low-k material and the etching/ashing processes. It provides a buffer that allows the Low-k material to benefit from chemical or plasma treatments without directly承受ing their damaging effects, thus preserving the material's electrical properties.
2Manufacturing precision
If etching is performed to control wiring depth, then the wiring depth can be controlled, but the Low-k film deteriorates and dielectric constant increases
Solution Approach 1:
The protective film is formed in advance before etching operations. This preliminary protective layer enables subsequent etching processes to be performed without directly damaging the Low-k material, allowing precise wiring depth control while maintaining the Low-k film's dielectric properties.
Solution Approach 2:
The protective film serves as a mediator during etching processes. It allows the etching to proceed controlledly to achieve desired wiring depth while preventing the etchant from directly attacking and deteriorating the Low-k material, thus stabilizing the dielectric constant.
3Ease of manufacture
If ashing is performed to remove resist, then the resist is removed, but the wiring trench pattern is damaged and RC delay increases
Solution Approach 1:
The protective film is formed before resist deposition and subsequent ashing processes. This preliminary protection layer remains in place during ashing, shielding the wiring trench pattern from plasma damage while allowing complete resist removal through the ashing process.
Solution Approach 2:
The protective film acts as an intermediary barrier during ashing. It permits the oxygen plasma to effectively remove the organic resist material while preventing the same plasma from directly damaging the inorganic wiring trench pattern, thus maintaining pattern integrity.
4Device complexity
If multiple process steps are performed to form multi-layered wiring, then the wiring structure is formed, but variations in electrical resistance occur
Solution Approach 1:
The protective film is formed at the beginning and maintained throughout all subsequent process steps including etching, ashing, and material deposition. This continuous protection ensures that the Low-k material properties remain stable across multiple processing stages, reducing variations in electrical resistance.
Solution Approach 2:
The protective film serves as a persistent intermediary that protects the Low-k material during all manufacturing operations. By consistently shielding the material from process-induced damage across multiple steps, it maintains uniform electrical properties throughout the multi-layered wiring fabrication process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the accuracy and reliability of the wiring trench pattern formation, reducing variations in electrical resistance and current flow, and minimizing damage to the wiring trench, thereby improving the overall performance and reliability of semiconductor devices.
Implementation Method 1
At least a layer from a top surface of the copper metal to the third low dielectric constant film is removed by a CMP method
Implementation Method 2
The film for serving as the mask layer is etched using a first resist mask formed over the film for serving as the mask layer so as to expose the third low dielectric constant film
Implementation Method 3
The first resist mask is removed by ashing
Data Source
AI summary
A manufacturing method of a semiconductor device is provided which can precisely control the depth of a wiring trench pattern, and which can suppress the damage on the wiring trench pattern. A second low dielectric constant film, a third low dielectric constant film, and a film for serving as a mask layer are laminated over a diffusion preventing film in that order. The film for serving as the mask layer is etched, and a wiring trench pattern is formed which has its bottom made of a surface of the third low dielectric constant film, so that a mask layer is formed. A first resist mask is removed by asking. A wiring trench is formed using the wiring trench pattern of the mask layer such that a bottom of the trench is comprised of the second low dielectric constant film. A layer from a top surface of the copper metal to the third low dielectric constant film is removed by a CMP method. Each low dielectric constant film has a dielectric constant lower than that of FSG, and the second low dielectric constant film has the dielectric constant lower than that of the third low dielectric constant film.