LPDDR4 Command Control System Timing Interference
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Solution Overview
Problem
Existing command control systems for storage devices, such as those compliant with the LPDDR4 standard, face interference issues between Row Address Strobe (RAS) and Column Address Strobe (CAS) commands due to their timing settings, leading to inefficiencies in data access operations.
Innovation Solution
A command control system that includes a setting section and an adjuster to determine and adjust the output timings of RAS and CAS commands based on a clock signal, ensuring that these commands for different access requests are set without interference, by prioritizing the timing of CAS commands over RAS commands when necessary.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the output timing of RAS commands is set independently without considering CAS command timing, then the command scheduling flexibility is improved, but interference between RAS and CAS commands occurs
Solution Approach 1:
The command control system implements feedback by monitoring the timing of CAS commands and using this information to adjust RAS command timing. The control logic detects when a CAS command is scheduled and feeds this information back to prevent scheduling RAS commands that would interfere with CAS commands, thereby maintaining both scheduling flexibility and execution reliability.
Solution Approach 2:
The patent introduces an intermediary control mechanism that mediates between RAS and CAS command scheduling. This intermediary layer checks the timing of both command types and coordinates their output to prevent interference, allowing independent scheduling flexibility while ensuring reliable execution by acting as a buffer between the two command streams.
2Productivity
If RAS commands are output at every cycle boundary, then the command throughput is improved, but interference with CAS commands increases
Solution Approach 1:
Instead of outputting RAS commands at every possible cycle boundary (excessive action), the system selectively outputs RAS commands only at cycle boundaries where no CAS command interference will occur (partial action). This approach maintains high command throughput by utilizing available cycle boundaries while avoiding the harmful interference that would result from saturated RAS command output.
Solution Approach 2:
The system implements periodic action by scheduling RAS commands at regular cycle boundaries while incorporating periodic checks to ensure no CAS command interference will occur. This maintains a rhythmic, high-throughput command schedule while the periodic verification prevents harmful interference, balancing productivity with interference reduction.
3Reliability
If the command timing is adjusted to avoid interference, then the command execution reliability is improved, but the timing flexibility is reduced
Solution Approach 1:
The patent applies parameter changes by dynamically adjusting the timing parameter of RAS commands based on the scheduled CAS command timings. Rather than fixing RAS command timing or using complex scheduling algorithms, the system changes the timing parameter of RAS commands to align with available cycle boundaries that do not conflict with CAS commands, achieving reliable execution with controlled complexity.
Data Source
AI summary
A command control system is provided which is configured to optimally set an output timing of a RAS command and an output timing of a CAS command for access requests different from each other. The command control system is configured to, when an output timing of a second RAS command is set in a first cycle time period which is a cycle starting from the reference time point, determine whether or not the second RAS command is output to a storage device in the first cycle time period in accordance with whether or not an output timing of a first CAS command is set in a second cycle time period constituted by a prescribed number of the cycles subsequent to the reference time point.