Automated LPE Environment Configuration for Circuit Parasitic Extraction
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Solution Overview
Problem
The increasing scale of integrated circuits leads to a significant increase in parasitic resistances and capacitances, prolonging post-simulation times and affecting design and delivery cycles due to the inefficiencies in parasitic parameter extraction and verification processes.
Innovation Solution
A method and apparatus that automate the setting of Layout Parasitic Extraction (LPE) environments based on types and parameters of layout units, enabling batch extraction of parasitic parameter netlists, thereby reducing the time required for parasitic parameter extraction and post-simulation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If post-simulation includes parasitic parameters and interconnection delay, then simulation accuracy is improved, but simulation time increases significantly
Solution Approach 1:
The patent applies preliminary action by pre-configuring multiple LPE environments with different parasitic parameter settings before simulation. This allows the simulation system to directly select and apply appropriate parasitic models without time-consuming setup during the simulation process, thereby maintaining high accuracy while reducing overall simulation time.
Solution Approach 2:
The patent segments the simulation process by separating parasitic parameter extraction and configuration into distinct LPE environments that can be prepared independently. This segmentation allows parallel processing of different parasitic models and enables selective application based on simulation requirements, improving both accuracy and efficiency.
2Adaptability or versatility
If the number of transistors on chip increases, then circuit functionality is improved, but parasitic parameter extraction time increases enormously
Solution Approach 1:
The patent applies parameter changes by creating multiple LPE environments with different parasitic parameter configurations (such as different extraction rules, precision levels, or model types). This allows the system to adapt parameter extraction settings based on circuit characteristics and simulation needs, maintaining functionality while reducing extraction time through optimized parameter selection.
Solution Approach 2:
The patent implements universality by designing a multi-functional LPE environment configuration system that can handle various types of layout units and extract different parasitic parameters using unified methods. This universal approach enables efficient processing of diverse circuit elements without requiring separate extraction procedures for each unit type.
3Measurement precision
If manual configuration of LPE environments is performed, then extraction accuracy is maintained, but operation complexity increases
Solution Approach 1:
The patent applies self-service by enabling layout units to automatically select and apply appropriate LPE environments based on their types and parameters. This automatic matching mechanism eliminates the need for manual configuration while maintaining extraction accuracy, as each layout unit is automatically paired with the most suitable parasitic extraction settings.
Solution Approach 2:
The patent implements feedback through an automatic matching mechanism that uses layout unit characteristics to select appropriate LPE environments. This feedback loop ensures that the correct extraction accuracy is maintained while eliminating manual intervention, as the system continuously adapts the extraction configuration based on the specific layout unit being processed.
Data Source
AI summary
An apparatus for analyzing a circuit includes: an information module, configured to obtain a plurality of layout cells; an environment configuration module, configured to set, based on types or parameters or combinations of the types and the parameters of the plurality of layout units, a plurality of LPE environments, each corresponding to a respective one of the types, the parameters, or the combinations; and a batch processing module, configured to, for each of the LPE environments, extract parasitic parameter netlists of more than one of the plurality of layout units in the LPE environment in batches.