Lower Page Only Programming for MLC SSD Data Integrity
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Solution Overview
Problem
Multi-level cell (MLC) solid-state memory devices face corruption of least significant bit (LSB) data due to interruptions during upper page programming, leading to data loss, as backup power solutions are often impractical or undesirable.
Innovation Solution
Implementing a lower page only (LPO) programming scheme where only lower pages are used for host data writes, with garbage collection and wear leveling to consolidate data into blocks using both upper and lower pages, thereby mitigating paired page corruption and ensuring data integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If upper page programming is performed in MLC memory, then storage capacity is improved, but data corruption occurs during programming interruptions
Solution Approach 1:
The memory block is divided into two separate pages: lower page for data storage and upper page for redundancy information. This segmentation allows the lower page to be programmed independently without risk of corruption from upper page programming interruptions, while still maintaining the benefits of MLC storage capacity.
Solution Approach 2:
The lower page is programmed first with the actual data before any upper page programming occurs. This preliminary action ensures that critical data is safely stored in a corruption-resistant state before subsequent operations that might be interrupted take place.
2Reliability
If backup power sources are implemented, then data integrity during programming is improved, but device complexity and cost increase
Solution Approach 1:
The solution extracts the reliability guarantee from the power supply system and relocates it to the data structure organization. Instead of relying on backup power to complete programming operations, the lower page-only scheme ensures data integrity through structural separation, making the system independent of complex power management mechanisms.
Solution Approach 2:
The invention uses simple, reliable lower page programming operations that can be completed quickly without requiring expensive backup power infrastructure. The approach accepts that programming may need to be retried but eliminates the need for complex power management hardware and software.
3Productivity
If lower page only programming is used, then write performance is improved, but storage capacity utilization decreases
Solution Approach 1:
The solution merges the advantages of lower page only programming (fast, reliable writes) with full MLC capacity utilization by using garbage collection to consolidate data from multiple lower pages into unified blocks that utilize both pages efficiently, achieving both performance and capacity goals.
Solution Approach 2:
While individual lower page programming operations are simple and fast, the system maintains continuous useful action through background garbage collection processes that gradually consolidate data into fully-utilized blocks, ensuring that storage capacity is maximized over time without impacting write performance.
Data Source
AI summary
A device includes a non-volatile solid-state memory array comprising a plurality of blocks, each of the plurality of blocks configured to store data in a single-bit per cell mode or a multiple-bit per cell mode, and a controller. The controller is configured to receive write data from a host device, program the write data to a first block of the plurality of blocks of the memory array using the single-bit per cell mode, and perform a data consolidation operation on the first block at least in part by programming at least a portion of the write data together with data stored in a separate second block of the memory array to a third block of the memory array using the multiple-bit per cell mode.