Low Power Serial Interconnect Protocol for Pin Reduction

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Solution Overview

Problem

Existing USB technologies face compatibility issues with advanced silicon processes due to voltage signaling requirements and are not power optimized, leading to unnecessary pin consumption in systems.

Innovation Solution

A low power serial (LPS) interconnect with a reduced complexity protocol for low power operation, using 8b/9b encoding, preamble, postamble, and error detection to enable efficient communication at data rates below 1 Gbps, and a multi-drop bus structure to reduce pin count and power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If USB voltage signaling requirements (3.3V with 5.0V tolerance) are used to ensure compatibility with existing USB devices, then broad device compatibility is achieved, but compatibility with advanced technology node silicon processes deteriorates

Engineering Contradiction:
Improvedevice compatibilityVSAvoidsilicon process compatibility
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent changes the voltage signaling parameter from USB's 3.3V (with 5.0V tolerance) to a lower voltage level that is compatible with advanced technology node silicon processes. This parameter change allows the interconnect to work with modern semiconductor fabrication processes while maintaining communication functionality through adapted voltage levels and signaling protocols.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If USB communication protocol is used to ensure standardized communication, then communication reliability is improved, but power consumption increases and pin usage is not optimized

Engineering Contradiction:
Improvecommunication reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent extracts and removes unnecessary overhead elements from the full USB communication protocol, retaining only the essential functions needed for reliable communication. By eliminating redundant protocol layers and features, the design achieves communication reliability while significantly reducing power consumption and pin requirements for internal device connections.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent applies partial action by implementing a simplified protocol that includes only the necessary components for reliable communication (such as basic error detection and data transfer mechanisms) without the full USB protocol stack. This partial implementation provides sufficient reliability for internal connections while avoiding the excessive power consumption and complexity of the complete USB specification.

Inventive Principle:
Principle #16Partial or excessive action

3Ease of operation

If USB connections are used for internal devices to ensure standardized interface, then ease of connection is improved, but pin consumption increases unnecessarily

Engineering Contradiction:
Improveconnection easeVSAvoidpin count
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent creates a universal low-power serial interconnect that can serve multiple internal device connection needs within a system. By designing a multi-functional interface that handles various communication requirements (data transfer, control signals, power management) through a standardized but simplified protocol, the system reduces the number of pins required compared to using full USB connections for each internal device.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS9524265B2Providing a serial protocol for a bidirectional serial interconnect
Publication Date: 2016.12.20 INTEL CORP
  • US9524265B2 patent drawing
  • US9524265B2 patent drawing
  • US9524265B2 patent drawing

AI summary

In one embodiment, the present invention includes a host controller with transmit logic to prepare data into a packet for communication along an interconnect and to transmit the packet. This packet may include a preamble portion having a first predetermined value, a content portion including the data and having a plurality of symbols each including a start bit separate from the data, an error detection portion including an inverted version of the content portion, and a postamble portion having a second predetermined value. Other embodiments are described and claimed.