Liquid Phase Sintering Solder Paste for Fine Pitch Interconnects
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Solution Overview
Problem
Current solder on die (SOD) with solder paste printing (SPP) technologies face issues such as multiple reflows leading to resist cross-linking, flux interaction with photoresist, and inconsistent solder wicking, resulting in merged solder bumps and smaller chip gaps, which affect the reliability and performance of fine pitch interconnects.
Innovation Solution
The use of liquid phase sintering (LPS) solder paste for forming sintered conductive vias and lines, which enables taller standoff heights and higher aspect ratio solder bumps, reducing wicking and flux interaction, and allowing for ultra-fine pitch interconnects with a single printing step, thereby minimizing thermal budget and preventing solder slumping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If multiple paste printings and reflows are used in SOD with SPP process, then tall solder height for fine pitch interconnects is achieved, but resist cross-linking increases and photoresist stripability deteriorates
Solution Approach 1:
The patent changes the thermal processing parameters by using a single reflow cycle with optimized temperature profile instead of multiple reflows, and employs a sintering process that achieves solder formation at lower temperatures to prevent photoresist cross-linking while still achieving the required solder height for fine pitch interconnects
Solution Approach 2:
The patent performs preliminary optimization of the solder paste formulation and printing parameters before the final reflow/sintering step, allowing achieving the desired solder height and shape in a single processing cycle, thereby eliminating the need for multiple paste printings and reflows that cause photoresist degradation
2Length of stationary object
If multiple paste printings and reflows are performed, then solder height is increased, but flux interaction with photoresist increases leading to flux absorption
Solution Approach 1:
The patent modifies the flux composition and activation temperature parameters, using a flux formulation that remains stable and does not excessively interact with photoresist at the optimized single reflow/sintering temperature, thereby preventing flux absorption while still achieving adequate solder height
Solution Approach 2:
The patent applies preliminary optimization of the flux paste formulation and printing parameters to ensure that the flux activates properly in a single reflow cycle without excessive interaction with the photoresist, achieving both adequate solder height and minimal flux absorption
3Reliability
If solder volume is reduced to decrease wicking during TCB, then wicking consistency improves, but chip gaps for underfills become smaller
Solution Approach 1:
The patent changes the solder paste formulation parameters, using a paste with optimized viscosity and particle size distribution that provides consistent wicking behavior during TCB while maintaining adequate solder volume to preserve sufficient chip gaps for underfill application
Solution Approach 2:
The patent employs a composite solder paste formulation that combines different particle sizes and material compositions to achieve both consistent wicking during thermal compression bonding and adequate volume retention to maintain chip gaps for underfills
4Ease of manufacture
If traditional solder paste is used for bond on trace (BOT), then soldering can be performed, but solder spreading becomes uncontrolled leading to bump bridging
Solution Approach 1:
The patent changes the solder paste formulation parameters, using a paste with optimized flux composition and viscosity that provides controlled solder flow during bonding, preventing uncontrolled spreading and bump bridging while maintaining ease of manufacturing for bond on trace applications
Solution Approach 2:
The patent replaces the traditional mechanical reflow soldering process with a sintering process that uses controlled thermal fields to form solder joints, providing better control over solder placement and preventing uncontrolled spreading that leads to bump bridging
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and performance of fine pitch interconnects by reducing thermal budget, minimizing photoresist cross-linking, and achieving high-bandwidth, low-loss signal transmission with improved coplanarity and reduced bump thickness variation.
Implementation Method 1
The use of liquid phase sintering (LPS) solder paste for forming sintered conductive vias and lines
Implementation Method 2
sintered conductive vias formed on the plurality of die pads using the LPS solder paste rather than a conventional solder paste
Implementation Method 3
increased flux interaction with photoresist that leads to flux absorption by the photoresist
Data Source
AI summary
Foundation layers and methods of forming a foundation layer are described. Die pads are formed over a die. A dielectric layer is formed over die pads and the die. The dielectric layer is then recessed to expose top portions of the die pads. A first plurality of sintered conductive vias are formed over the die pads. The first sintered conductive vias are coupled to at least one of the die pads. In addition, a photoresist layer may be formed over the dielectric layer and the top portions of the die pads. Via openings are formed in the photoresist layer. A second plurality of sintered conductive vias may then be formed over the first sintered conductive vias to form a plurality of sintered conductive lines. Each of the first and second sintered conductive vias are formed with a liquid phase sintering (LPS) solder paste.