LSI Net Delay Calculation Using Segmented Precision Methods
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Solution Overview
Problem
Current methods for calculating delay times in LSI circuits face challenges in achieving high accuracy while minimizing calculation cost, especially with the increasing complexity and scale of designs, where the number of nets exceeds 10,000,000, leading to impractically long calculation times.
Innovation Solution
A delay time calculating apparatus and method that categorize nets based on judging conditions to selectively apply either simple or detailed calculation procedures, prioritizing calculation accuracy and cost efficiency by determining the appropriate method for each net type, switching from high-precision to simple calculations when necessary to meet time constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If high-precision calculation method is applied to all nets, then calculation accuracy is improved, but calculation time becomes extremely long and impractical
Solution Approach 1:
The patent segments the calculation process by dividing nets into different categories (bus nets and non-bus nets) based on specific conditions. Different calculation methods are applied to different segments: high-precision method for bus nets and simplified method for non-bus nets. This segmentation allows the system to achieve high accuracy where needed while reducing overall calculation time.
Solution Approach 2:
The patent applies local quality by using different calculation precision levels for different types of nets. Bus nets receive high-precision calculation when needed, while non-bus nets use simplified calculation. This localized application of quality ensures optimal accuracy-performance tradeoff for each specific case rather than uniform treatment.
2Measurement precision
If high-precision calculating method is used for all nets, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent segments the calculation approach based on net type identification. By dividing nets into bus nets and non-bus nets, the system can apply complex high-precision methods only where necessary (bus nets) while using simpler methods for others, thereby reducing overall computational complexity.
Solution Approach 2:
The patent applies partial high-precision action by using simplified calculation methods for non-bus nets where high precision is not critical. This partial application of complex methods only where needed reduces unnecessary computational overhead while maintaining sufficient accuracy for critical paths.
3Productivity
If simplified calculation method is used, then calculation time is reduced, but calculation accuracy deteriorates
Solution Approach 1:
The patent segments nets into categories and applies appropriate calculation methods accordingly. Simplified methods are applied to non-bus nets where speed is prioritized, while high-precision methods are reserved for bus nets where accuracy is critical, achieving optimal balance between speed and accuracy.
Solution Approach 2:
The patent changes the calculation parameter (method type) based on net characteristics. By detecting whether a net is a bus net and adjusting the calculation method accordingly, the system optimizes the tradeoff between calculation speed and accuracy for each specific net type.
4Ease of operation
If calculation method is selected based solely on wiring length, then ease of operation is improved, but measurement precision deteriorates due to model selection sensitivity
Solution Approach 1:
The patent changes the selection criterion from solely wiring length to a multi-parameter approach that includes net type identification (bus net vs. non-bus net). This parameter change reduces sensitivity to small wiring length differences and improves model selection stability while maintaining ease of operation through automated detection.
Data Source
AI summary
An apparatus calculates a delay time of nets within a circuit included in design data by a processing unit. The processing unit performs a process that includes selecting a first calculation to calculate the delay time of a net when the net satisfies a first condition, when the first calculation is not selected by the selecting, selecting the first or second calculation to calculate the delay time of the net, depending on whether the net satisfies a second condition, and calculating the delay time of the net by the first or second calculation selected by the selecting.


