Hardware Switch-Over for LSP Protection in Real-Time Networks
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Solution Overview
Problem
Traditional data communication systems, especially those designed for non-real-time applications, suffer from slowness and delays due to CPU-dependent switch-over processes, which are inadequate for real-time functionality and result in slow switch-over times, particularly with a large number of connections.
Innovation Solution
A system and method utilizing a configurable integrated circuit, such as an ASIC or FPGA, to signal the need for a switch-over in real-time data communication, moving the switch-over tasks from CPU to hardware and enabling fast IP-based connections with protection switching protocols like Label Switched Path (LSP), allowing for switch-over in less than 50 ms.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If CPU-based switch-over process is used, then system complexity is reduced, but switch-over time becomes too slow for real-time applications
Solution Approach 1:
The patent replaces the CPU-based software switch-over process with a hardware-based ASIC mechanism. The ASIC detects connection failures and automatically triggers protection switching without CPU intervention, achieving sub-50ms switch-over times suitable for real-time applications like VoIP. This substitution of mechanical (CPU software) system with hardware (ASIC) system directly resolves the speed contradiction.
Solution Approach 2:
The patent segments the switch-over function from the general CPU processing by implementing a dedicated ASIC module specifically for connection monitoring and protection switching. This segmentation allows the critical real-time switch-over function to operate independently at hardware speed, while the CPU can focus on higher-level network management tasks.
2Productivity
If CPU handles large number of interrupt requests, then system versatility is improved, but processing speed decreases
Solution Approach 1:
The patent substitutes CPU-based interrupt handling with ASIC-based automatic detection and switching. The ASIC continuously monitors connection status and automatically activates protection paths without generating CPU interrupts, enabling the CPU to maintain high processing speed while the ASIC handles the versatile connection management tasks.
Solution Approach 2:
The ASIC implements self-service functionality by automatically detecting connection failures and triggering protection switching without requiring CPU intervention or interrupt processing. This self-service mechanism maintains CPU processing speed while providing versatile connection monitoring and switching capabilities through the dedicated hardware logic.
Data Source
AI summary
A method, a system, and a network entity for performing the switch-over of a protected Label Switched Path (LSP) in (less than) 50 ms. A goal of the preferable arrangement is to move the tasks related to the switch-over away from the CPU to hardware (HW). The ASIC applies a communication protocol to signal a need for a switch-over between two (or several) units without CPU's participation. A unit, for example Sink of protected domain, which has detected a fault, sends a so-called protection message to a protection pair unit of the unit. The protection pair unit interprets the protection message and actives the connection on the protecting unit.