LSPR Sensing Chip Nanostructure Design for High Sensitivity
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Solution Overview
Problem
Conventional ELISA technology is expensive, time-consuming, and prone to errors due to fluorescent labeling interference, while LSPR chips have lower sensitivity due to wider resonance spectra and dependence on analyte proximity to hot spots.
Innovation Solution
A sensing chip with periodically arranged nano structures comprising a bottom metal layer, a middle dielectric layer, and a top metal layer, where the bottom metal layer has a larger area than the top metal layer, enhancing detection sensitivity and spectra resolution by optimizing plasmon resonance spectra.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional ELISA technology is used, then detection sensitivity is high, but inspection time and cost increase, and fluorescent labeling interference occurs
Solution Approach 1:
The patent replaces the mechanical/chemical ELISA system with an optical LSPR sensing system. Instead of using fluorescent labeling and enzyme-linked reactions, the invention uses localized surface plasmon resonance of metal nanostructures to detect analytes through refractive index changes, eliminating the need for time-consuming labeling steps while maintaining high detection sensitivity
Solution Approach 2:
The patent extracts and eliminates the fluorescent labeling step from the detection process. By using LSPR technology, the invention removes the source of interference (fluorescent molecules) while preserving the ability to detect analytes through direct interaction with the metal nanostructure surface
2Loss of time
If LSPR chip is used, then inspection time is reduced and labeling is eliminated, but detection sensitivity is lower due to wider resonance spectra
Solution Approach 1:
The patent applies local quality by creating metal nanostructures with non-uniform cross-sections (different widths at bottom and top). This geometric variation concentrates the plasmon resonance at specific locations (hot spots) where the analyte interacts most strongly, enhancing the local sensing capability and improving detection sensitivity while maintaining the label-free advantage
Solution Approach 2:
The patent changes the geometric parameters of the metal nanostructures by making the bottom width greater than the top width. This parameter modification optimizes the plasmon resonance characteristics, narrowing the resonance linewidth and enhancing the sensitivity to refractive index changes, thereby improving detection capability
3Device complexity
If LSPR chip is used, then labeling steps are reduced, but detection accuracy decreases due to analyte distance from hot spots
Solution Approach 1:
The patent extends the interaction volume by creating vertical plasmon resonance modes through the non-uniform metal nanostructure. The plasmon resonance occurs not only at the surface but also extends into the dielectric medium, creating a larger effective sensing volume that increases the probability of analyte interaction with the hot spots
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The novel nano structure design improves detection sensitivity and spectra resolution, allowing for more accurate detection of low-concentration analytes without labeling, reducing inspection time and steps, and increasing the dynamic range of the sensor chip.
Implementation Method 1
Chips of localized surface plasmon resonance (LSPR) can be free of any labeling with a fast inspection effect, in which the surface plasmon resonance spectra of a metal nano structure are utilized. Because the LSPR is sensitive to a refractive index change of a metal-dielectric interface
Data Source
AI summary
A sensing chip is provided, which includes a substrate and a plurality of nano structures periodically arranged on the substrate, wherein each of the nano structures includes a bottom metal layer disposed on the substrate, a middle dielectric layer disposed on the bottom metal layer, and a top metal layer disposed on the middle dielectric layer. The bottom metal layer has an area that is larger than that of the top metal layer.