LTE Circular Buffer Rate Matching with Early Dummy Bit Removal
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Solution Overview
Problem
Existing rate matching systems in wireless communications, such as those in the LTE standard, are inefficient due to the need for marking and removing null bits, which increases memory usage and processing time, especially when using methods like marking a full byte to represent a single bit of data.
Innovation Solution
A method and logic circuit for circular buffer rate matching that permutes, transposes, and shuffles bit streams, then removes null bits based on their location determined by the number of prepended null bits and permutation patterns, generating a combined bit stream without the null bits for storage in a circular buffer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If null bits are marked using a full byte to represent a single bit of data, then the null bits can be identified and removed, but memory usage and processing time increase significantly
Solution Approach 1:
The patent changes the parameter of null bit representation from using a full byte (8 bits) to using a single bit indicator. This parameter change reduces the memory required to mark null bits from 8 times the number of null bits to just the number of null bits, directly resolving the contradiction between reliable null bit identification and memory efficiency.
2Reliability
If null bits are marked using a full byte to represent a single bit of data, then the null bits can be identified and removed, but processing time increases due to additional memory accesses
Solution Approach 1:
The patent changes the parameter of null bit representation from using a full byte (8 bits) to using a single bit indicator. This parameter change reduces the memory required to mark null bits from 8 times the number of null bits to just the number of null bits, directly resolving the contradiction between reliable null bit identification and memory efficiency.
3Productivity
If null bits are removed after all bit ordering operations, then the rate matching can be completed, but the processing time and memory accesses increase
Solution Approach 1:
The patent applies preliminary action by removing null bits immediately after they are inserted and before the bit ordering operations (permutation, transposition, shuffling) are performed. This eliminates the need to process and then remove null bits after all operations, reducing both processing time and memory accesses while ensuring rate matching completion.
Data Source
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AI summary
A method and a logic circuit for rate matching for three equally sized bit streams, including: prepending each of the bit streams with null bits (220); permuting the first two bit streams according to a first permutation pattern (230); permuting the third bit stream based on the first permutation pattern (240); transposing the three bit streams (250); shuffling the second and third bit streams (260); removing the null bits from the first bit stream (270) and from the shuffled bit stream (280), wherein location of the null bits in the first bit stream is based only on a number of prepended null bits and the first permutation pattern and location of the null bits in the shuffled bit stream is based only on the number of prepended null bits, the first permutation pattern, and a null index related to the number of prepended null bits; and generating a combined bit stream from the three bit streams (290). The disclosed rate matching differs from the circular buffer rate matching as specified by 3GPP TS 36.212 in that the pruning or removal dummy bits is performed prior to the bit collection.