LTPO Array Substrate Contact Structure for Small Via Reliability

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Solution Overview

Problem

The manufacturing of low temperature polycrystalline oxide (LTPO) display panels is hindered by the issue of small contact holes in the source/drain electrode and semiconductor layer, leading to increased contact resistance and breakage of the source/drain electrode, which decreases the yield of LTPO products.

Innovation Solution

The array substrate design includes a first recess and a third via hole with a first source/drain electrode that covers the inner sidewall and bottom surface of these features, along with a stepped surface to reduce contact resistance and prevent breakage, utilizing a sequence of insulating and inorganic layers to facilitate electrical connection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a thicker inorganic film is used as a barrier between LTPS and IGZO transistors, then interference between transistors is prevented, but contact resistance increases and source/drain electrode breakage occurs

Engineering Contradiction:
Improvetransistor interference preventionVSAvoidcontact resistance and electrode breakage
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The contact hole is segmented into two parts: a first contact hole through the inorganic film and a second contact hole through the insulating film, connected to each other. This segmentation allows the source/drain electrode to make contact with the semiconductor layer through multiple pathways, reducing contact resistance and preventing breakage while maintaining the barrier function of the thick inorganic film.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The contact structure transitions from a single vertical hole to a multi-dimensional pathway system with first and second contact holes at different depths and orientations. This dimensional change creates additional contact areas and pathways, reducing reliance on a single narrow hole and thereby reducing contact resistance and breakage risk.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If high pixels per inch (PPI) is achieved with small source/drain electrode diameter, then display resolution is improved, but contact hole becomes too small causing electrode breakage

Engineering Contradiction:
Improvepixels per inchVSAvoidsource/drain electrode integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The contact pathway is divided into multiple segments (first contact hole and second contact hole) that can be independently optimized. This allows the overall contact structure to accommodate small electrode diameters required for high PPI while maintaining sufficient contact area through the segmented pathway, preventing electrode breakage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The first and second contact holes are nested or connected in sequence, with the second contact hole positioned to receive and connect with the first contact hole. This nested structure creates a continuous conductive pathway that maintains structural integrity even when individual hole dimensions are reduced for high PPI applications.

Inventive Principle:
Principle #7Nested doll (Nesting)

Data Source

PatentUS12402481B2Array substrate and manufacturing method thereof
Publication Date: 2025.08.26 WUHAN CHINA STAR OPTOELECTRONICS SEMICONDUCTOR DISPLAY TECHNOLOGY CO LTD
  • US12402481B2 patent drawing
  • US12402481B2 patent drawing

AI summary

An array substrate and a manufacturing method thereof are provided. The array substrate includes a substrate and a first recess. The first recess sequentially extends through a second inorganic layer, a third insulating layer, a first inorganic layer, a second insulating layer, a first insulating layer, a first semiconductor layer, and a portion of a barrier layer. A bottom surface of the first recess is formed inside the barrier layer.