LTPO Display Substrate Layout for Uniform Via Hole Etching

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Solution Overview

Problem

Existing display substrates face challenges in yield due to non-uniform critical dimensions and abnormal slope angles caused by different etching depths of via holes in LTPO technology, which combines LTPS and metal oxide semiconductor layers.

Innovation Solution

The display substrate design includes a first active layer and a second active layer made of different materials, both in the same layer and same material, allowing for a uniform etching process of via holes, ensuring consistent etching depths and improving yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If different etching depths are used for via holes in LTPS and metal oxide semiconductor layers, then the etching process can accommodate different material requirements, but the critical dimensions become non-uniform and slope angles become abnormal

Engineering Contradiction:
Improveetching process adaptabilityVSAvoidcritical dimension uniformity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent merges the etching processes for LTPS and metal oxide semiconductor layers into a single unified etching step. By designing the via hole structure to penetrate both layers simultaneously with consistent etching parameters, the patent achieves uniform critical dimensions and slope angles while maintaining compatibility with different material properties through optimized via hole geometry and positioning.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If separate etching processes are used for LTPS and metal oxide semiconductor layers, then material-specific requirements are met, but the manufacturing complexity and cost increase

Engineering Contradiction:
Improvematerial property optimizationVSAvoidpatterning process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple etching operations into one unified etching process that handles both LTPS and metal oxide semiconductor layers. This is achieved through careful design of the via hole structure, etching selectivity, and process parameters, thereby reducing manufacturing steps, lowering costs, and simplifying the overall patterning process while maintaining material-specific performance requirements.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If via holes are etched to different depths for different layers, then layer-specific electrical properties are optimized, but the yield of the display substrate decreases

Engineering Contradiction:
Improveelectrical property optimizationVSAvoidsubstrate yield
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements a unified etching approach where via holes penetrate both LTPS and metal oxide semiconductor layers in a single process step. This consolidation eliminates variability associated with multiple etching steps, ensures consistent electrical properties across different layers, and significantly improves substrate yield by reducing process-induced defects and non-uniformities.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12550441B2Display substrate, method for manufacturing same, and display device
Publication Date: 2026.02.10 CHONGQING BOE DISPLAY TECH CO LTD
  • US12550441B2 patent drawing
  • US12550441B2 patent drawing
  • US12550441B2 patent drawing

AI summary

The present application provides a display substrate, a method for manufacturing the same, and a display device, which belongs to the technical field of displays. The display substrate includes: a base substrate and a plurality of sub-pixels on the base substrate, the sub-pixels include a sub-pixel driving circuit and a light-emitting element. The sub-pixel driving circuit includes: a first transistor and a second transistor; an active layer structure of the first transistor includes a first active layer and a second active layer connected to the first active layer. The second active layer is located at a side of the first active layer away from the base substrate, the first active layer includes a first active portion and a second active portion which are independent from each other, and the first active portion and the second active portion are connected to two ends of the second active layer, respectively.