LTPO Pixel Driving Circuit Layout With Overlapping Gate Lines
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Solution Overview
Problem
The layout area of pixel driving circuits in display panels using LTPO technology is large due to separate gate lines for N-type oxide and P-type low-temperature polysilicon transistors, leading to inefficiencies.
Innovation Solution
The pixel driving circuit integrates a first conductive layer with a first gate line forming a gate of a low-temperature polysilicon transistor and a third conductive layer with a second gate line forming a gate of an oxide transistor, with overlapping orthographic projections to reduce layout area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If separate gate lines are used for N-type oxide and P-type low-temperature polysilicon transistors, then each transistor can be independently driven, but the layout area of the pixel driving circuit becomes large
Solution Approach 1:
The patent merges the gate line structures by having the first gate line serve dual purposes: forming the gate of the P-type low-temperature polysilicon transistor and simultaneously serving as the second gate line for the N-type oxide transistor. This combining of functions reduces the number of separate conductive layers and lines needed, thereby reducing the overall layout area while maintaining independent driving capability for both transistor types.
Solution Approach 2:
The first gate line is designed with multi-functionality, serving as both the gate line for the P-type low-temperature polysilicon transistor and the gate line for the N-type oxide transistor. This universal design allows a single conductive structure to perform multiple functions, reducing the complexity and area of the pixel driving circuit while ensuring both transistor types can be independently controlled.
2Ease of operation
If multiple separate gate lines are used for different transistor types, then proper gate driving signals can be provided, but the conductive layer structure becomes complex
Solution Approach 1:
The patent combines multiple gate line functions into a single first gate line structure that operates at different levels or configurations to serve both P-type and N-type transistors. This merging reduces the number of separate conductive layers and interconnection paths, simplifying the overall conductive layer structure while still enabling proper gate driving signal provision for both transistor types through appropriate signal routing and timing control.
Data Source
AI summary
The present application relates to the technical field of displays. Provided are a display panel and a display apparatus. The display panel comprises a first pixel driving circuit, wherein the first pixel driving circuit comprises a low-temperature polysilicon transistor and an oxide transistor. The display panel further comprises: a base substrate, a first conductive layer and a third conductive layer, wherein the first conductive layer comprises a first gate line, and part of the structure of the first gate line is used for forming a gate electrode of the low-temperature polysilicon transistor; the third conductive layer comprises a second gate line, and part of the structure of the second gate line is used for forming a gate electrode of the oxide transistor; and the orthographic projection of the first gate line on the base substrate extends in a first direction.