LTPO Pixel Circuit Layout for Gate Voltage Stability

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Solution Overview

Problem

The use of low temperature polycrystalline oxide (LTPO) technology in display panels results in leakage current issues due to voltage changes on the gate line affecting normal drive of the panel, particularly impacting the oxide transistor's performance.

Innovation Solution

A pixel driving circuit design incorporating P-type low temperature polysilicon transistors with a specific layout of conductive layers and transistors, including a second transistor as an N-type oxide transistor, to mitigate gate line voltage effects by using a parallel-plate capacitor configuration and optimized conductive layer arrangements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If LTPO technology is used to reduce leakage current, then power consumption is reduced, but gate line voltage changes adversely affect oxide transistor performance

Engineering Contradiction:
Improveleakage currentVSAvoidoxide transistor performance
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

A compensation transistor is introduced as an intermediary element between the gate line and the oxide transistor. This compensation transistor absorbs or counteracts the adverse voltage changes from the gate line, protecting the oxide transistor from direct voltage fluctuations while maintaining the low leakage current benefits of LTPO technology

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent modifies the electrical parameters of the pixel driving circuit by adding the compensation transistor, which changes the voltage distribution and current flow characteristics. This parameter modification allows the circuit to maintain stable oxide transistor performance despite gate line voltage variations

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If a separate gate line is provided for the oxide transistor, then the transistor can be controlled independently, but voltage changes on the gate line adversely affect normal drive

Engineering Contradiction:
Improveindependent controlVSAvoidnormal drive
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The compensation transistor serves as a mediator that decouples the gate line voltage fluctuations from the oxide transistor. It maintains independent control capability while filtering out harmful voltage changes, allowing the oxide transistor to respond to control signals without being adversely affected by gate line noise

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The compensation transistor provides beforehand cushioning by being positioned in the circuit path to preemptively absorb or counteract voltage changes before they reach the oxide transistor. This protective arrangement ensures stable operation even when gate line voltage fluctuates

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20250344588A1Display panel, display device
Publication Date: 2025.11.06 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US20250344588A1 patent drawing
  • US20250344588A1 patent drawing
  • US20250344588A1 patent drawing

AI summary

A display panel includes a base substrate, a second conductive portion, and first, second and fourth conductive layers located at a side of the base substrate. The first conductive layer includes a first gate line of which orthographic projection extends along a first direction and a partial structure forms a fourth transistor's gate and a first conductive portion forming a driving transistor's gate. The second conductive layer includes a second gate line of which orthographic projection extends along the first direction and is located between orthographic projections of the first conductive portion and the first gate line, and a partial structure forms a second transistor's first gate. Orthographic projection of the second conductive portion at least partially overlaps with that of the first gate line. The fourth conductive layer includes a first connection portion connected to the first and second conductive portions.