LTPO Drive Substrate Stacking for Higher Charge Storage
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Solution Overview
Problem
The prior art LTPO thin film transistor has a small capacitance charge storage capability and a complex manufacturing process, which limits its performance and efficiency.
Innovation Solution
A drive substrate is designed with a first and second thin film transistor, along with a first and second capacitor, where the first gate electrode is used as an electrode plate for both capacitors, and the capacitors share a second electrode plate, forming a sandwich structure to enhance charge storage capacity, and the manufacturing method involves specific layer deposition and patterning processes to optimize the substrate's structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a conventional LTPO thin film transistor structure is used, then the display panel achieves high resolution and high reaction speed, but the capacitance charge storage capability is insufficient
Solution Approach 1:
The patent merges the gate electrode of the first thin film transistor with the first electrode plate of the first capacitor, making them a shared component. This integration increases the capacitance charge storage capability while reducing the overall device complexity by eliminating separate structures for both components
Solution Approach 2:
The gate electrode of the first thin film transistor serves dual functions: as the control electrode for the transistor and as the first electrode plate for the first capacitor. This multi-functionality increases charge storage capability without adding additional structural complexity
2Quantity of substance
If traditional capacitor structures are used, then sufficient charge storage is achieved, but the occupied area and film thickness increase
Solution Approach 1:
The patent transitions from a planar capacitor structure to a three-dimensional stacked structure where the first and second capacitors are vertically arranged. The first capacitor is positioned above the first thin film transistor, and the second capacitor is positioned above the first capacitor, utilizing the vertical dimension to increase charge storage capacity without increasing the occupied area on the substrate
Solution Approach 2:
The patent implements a nested arrangement where the second capacitor is positioned above the first capacitor, which itself is positioned above the first thin film transistor. This nested vertical stacking allows multiple capacitor structures to occupy the same lateral footprint, increasing charge storage capacity while minimizing the occupied area
3Reliability
If separate gate electrodes and electrode plates are used for transistors and capacitors, then device functionality is ensured, but the manufacturing process becomes complicated
Solution Approach 1:
The patent combines the formation of the gate electrode and the first electrode plate into a single manufacturing step, where both structures are created simultaneously from the same conductive layer. This merging simplifies the manufacturing process while ensuring both the transistor and capacitor functions are properly established
Solution Approach 2:
The gate electrode structure serves as both the control element for the first thin film transistor and the first electrode plate for the first capacitor. This universal structure ensures proper device functionality for both components while reducing the number of separate manufacturing steps required
4Quantity of substance
If conventional capacitor designs are used, then charge storage is provided, but the overall device thickness increases
Solution Approach 1:
The patent utilizes vertical stacking to arrange capacitors in the thickness direction rather than expanding them laterally. By positioning the first capacitor above the first thin film transistor and the second capacitor above the first capacitor, the design provides increased capacitance storage while confining the thickness increase to a compact vertical arrangement rather than lateral expansion
Data Source
AI summary
The present application discloses a driving substrate, a manufacturing method thereof, and a display panel. The driving substrate comprises a substrate, a first thin film transistor, a second thin film transistor, a first capacitor, and a second capacitor. The first thin film transistor comprises a first gate electrode first capacitor located on the substrate, the first capacitor comprises a first electrode plate and a second electrode plate, the second electrode plate is located above the first electrode plate, the first gate electrode is also used as the first electrode plate, the second capacitor comprises a second electrode plate and a third electrode plate, and the third electrode plate is located above the second electrode plate.