LTPS Array Substrate Ion-Doping Barrier and Electrode Integration
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Solution Overview
Problem
The conventional LTPS TFT array substrate manufacturing process suffers from a short channel effect due to ion-doping diffusion and requires a complex 7-Mask process, which degrades TFT performance and complicates the preparation process.
Innovation Solution
The array substrate is designed with a Poly-Silicon layer having ion-doped regions on both sides of the channel region, and a metal layer comprising a gate electrode, source electrode, drain electrode, gate line, and data line made from the same metallic material, allowing for ion-doping using photoresist as a barrier layer and reducing the number of Masks needed in the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If ion-doping is performed using the gate electrode as a barrier layer, then the source-drain region can be doped, but doped ions diffuse into the channel region during annealing, causing short channel effect and degrading TFT performance
Solution Approach 1:
The patent segments the barrier layer function from the gate electrode to a separate photoresist layer. The photoresist is patterned to cover only the channel region, creating a localized barrier that prevents ion diffusion into the channel while allowing doping of the source-drain region. This segmentation resolves the contradiction by decoupling the barrier function from the gate electrode structure.
Solution Approach 2:
The patent introduces photoresist as an intermediary barrier layer between the ion-doping source and the channel region. This intermediary photoresist layer serves as a temporary protective barrier during ion-doping, preventing harmful ion diffusion into the channel while allowing the doping process to proceed in the source-drain region. The photoresist is subsequently removed, leaving the channel region protected.
2Manufacturing precision
If a 7-Mask process is used to form gate electrode, source-drain electrodes, and other patterns separately, then each component can be precisely patterned, but the manufacturing process becomes complex and time-consuming
Solution Approach 1:
The patent merges the patterning of gate electrode, source electrode, and drain electrode into a single metal layer that is formed and patterned together. This unified metal layer structure eliminates the need for separate masking and patterning steps for each electrode, significantly simplifying the manufacturing process while maintaining precise electrode positioning through the shared pattern design.
Solution Approach 2:
The patent creates a multi-functional metal layer that simultaneously serves as the gate electrode, source electrode, and drain electrode. This universal metal layer structure performs multiple functions that traditionally required separate components and processes, reducing manufacturing complexity while maintaining the precise electrical connections and functional separation needed for TFT operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design reduces the short channel effect, decreases coupling capacitance, and simplifies the manufacturing process by integrating multiple electrodes into a single metal layer patterning process, thereby improving TFT performance and process efficiency.
Implementation Method 1
by using photoresist coated above the channel region as a barrier layer, ion-doping is performed with respect to the ion-doped regions
Implementation Method 2
the Poly-Silicon layer should undergo an annealing treatment. The annealing treatment functions for restructuring Poly-Silicon crystal lattice and diffusing dopant-ions
Implementation Method 3
LTPS technology is the a new generation of manufacturing process of a TFT display, which mainly uses processes such as excimer laser annealing (ELA), metal induced crystallization (MIC) or solid phase crystallization (SPC) to convert an a-Si thin film into a P-Si thin film layer
Implementation Method 4
LTPS technology is the a new generation of manufacturing process of a TFT display, which mainly uses processes such as excimer laser annealing (ELA), metal induced crystallization (MIC) or solid phase crystallization (SPC) to convert an a-Si thin film into a P-Si thin film layer
Data Source
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Figure 4-2~4-4
AI summary
A manufacturing method of an arrayed substrate is disclosed, in which ion-doping is performed by using photoresist as a barrier layer instead of using a gate electrode, which process can reduces the short channel effect that is caused by diffusion of doped ions toward a channel region, and meanwhile decrease the coupling capacitance between the gate electrode and the source-drain electrodes, thereby improving the performance of the prepared TFT.