LTPS GOA Circuit with N and P-Type Transistors for Leakage Reduction
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Solution Overview
Problem
The GOA circuit for LTPS semiconductor TFTs faces issues with poor stability and high power consumption, particularly in single-type TFT elements, which affects the performance and efficiency of liquid crystal display systems, especially in small and medium-sized applications.
Innovation Solution
A GOA circuit design utilizing cascade-connected GOA units with both N-type and P-type transistors, incorporating transmission, transmission control, information storage, data erase, output control, and output buffer parts, along with NOR and NAND gate logic units, to optimize signal transmission and storage, reducing TFT leakage and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If single-type TFT elements are used in GOA circuit, then the structure is simplified, but the stability is poor and power consumption is large
Solution Approach 1:
The patent combines both N-type and P-type TFT elements within the same GOA circuit unit, creating a dual-type transistor configuration. This merging of different transistor types allows the circuit to leverage the complementary characteristics of N-type (high electron mobility) and P-type (high hole mobility) transistors, thereby improving circuit stability while maintaining reasonable structural complexity
Solution Approach 2:
The patent changes the parameter of transistor type from single-type to dual-type (N-type and P-type). By altering this fundamental parameter, the circuit achieves better stability through complementary transistor characteristics while managing power consumption through optimized switching behavior of both transistor types
2Ease of manufacture
If single-type TFT elements are used in GOA circuit, then the manufacturing is simplified, but power consumption is large
Solution Approach 1:
The patent merges N-type and P-type TFT elements in the GOA circuit to create complementary switching pairs. This combination enables more efficient power management where one transistor type can be optimized for specific switching operations while the other handles complementary functions, reducing overall power consumption despite the slightly increased manufacturing complexity
Solution Approach 2:
The patent changes the transistor type parameter from uniform single-type to mixed N-type and P-type configuration. This parameter change enables exploitation of different carrier mobilities (electrons in N-type, holes in P-type) to optimize switching efficiency and reduce power consumption in different circuit stages
3Ease of operation
If traditional GOA circuit design is used, then the implementation is straightforward, but TFT leakage is high
Solution Approach 1:
The patent combines N-type and P-type transistors to form complementary switching structures that can more effectively suppress leakage currents. The complementary nature of the transistor pairs allows for better off-state control, reducing TFT leakage while maintaining straightforward implementation through systematic circuit design
Solution Approach 2:
The patent converts the potential harm of TFT leakage into a benefit by using complementary N-type and P-type transistor pairs where the off-state of one transistor type compensates for the leakage of the other, effectively transforming the leakage issue into an opportunity for improved circuit performance
Data Source
AI summary
The present invention provides a GOA circuit of LTPS semiconductor TFT, employed for backward scan transmission, comprising a plurality of GOA units which are cascade connected, and N is set to be a positive integer and an Nth GOA unit utilizes a plurality of N-type transistors and a plurality of P-type transistors and the Nth GOA unit comprises a transmission part (100), a transmission control part (200), an information storage part (300), a data erase part (400), an output control part (500) and an output buffer part (600). The transmission gate is employed to perform the former-latter stage transferring signal, and the NOR gate logic unit and the NAND gate logic unit are employed to convert the signals, and the sequence inverter and the inverter are employed to save and transmit the signals to solve the issues that the stability of the circuit is poor, and the power consumption is larger as concerning the LTPS with single type TFT elements, and the problem of TFT leakage of the single type GOA circuit to optimize the performance of the circuit. The ultra narrow frame or frameless designs can be realized.