CMOS Circuit Using LTPS and Oxide TFTs for Display Shift Registers
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Solution Overview
Problem
Existing CMOS circuits combining LTPS and oxide semiconductor TFTs face challenges due to large area occupation by oxide semiconductor TFTs and residual charge issues leading to operational failures and reliability concerns, particularly in display devices requiring fail-safe functions.
Innovation Solution
A CMOS circuit configuration using p-type LTPS TFTs for high potential supply and n-type oxide semiconductor TFTs for low potential supply, with a p-type pull-down TFT to manage voltage levels, reducing the need for bootstrapping and minimizing circuit area, while leveraging the higher mobility and lower leakage current of p-type TFTs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If oxide semiconductor TFTs are used in CMOS circuits, then reliability is improved due to lower leakage current, but circuit area increases significantly
Solution Approach 1:
The patent applies local quality by using different TFT types in different circuit regions: oxide semiconductor TFTs are used specifically for switch transistors where low leakage is critical, while LTPS TFTs are used for drive transistors where high mobility is needed. This selective placement optimizes both reliability and area efficiency.
Solution Approach 2:
The patent employs composite materials by integrating two different semiconductor materials (oxide semiconductor and LTPS) in a single CMOS circuit. This hybrid approach combines the advantages of both materials: oxide semiconductor provides low leakage for switch transistors, while LTPS provides high mobility for drive transistors, achieving both small circuit area and high reliability.
2Object-generated harmful factors
If oxide semiconductor TFTs are used, then leakage current is reduced, but residual charge issues cause operational failures
Solution Approach 1:
The patent introduces an intermediary mechanism by adding a reset transistor and reset signal path that actively removes residual charge from the oxide semiconductor TFT. This intermediary charge removal mechanism prevents operational failures while maintaining the low leakage advantage of oxide semiconductor TFTs.
Solution Approach 2:
The circuit implements self-service by incorporating self-reset functionality through the reset transistor that automatically clears residual charge from oxide semiconductor TFTs during the reset phase. This self-managed charge removal eliminates the need for external intervention and prevents operational failures.
3Power
If LTPS TFTs are used, then driving ability is improved, but leakage current increases
Solution Approach 1:
The patent applies local quality by strategically placing LTPS TFTs only where high driving ability is required (drive transistors), while using oxide semiconductor TFTs in switch transistor positions where low leakage is paramount. This spatial differentiation of TFT types optimizes both driving ability and leakage control.
4Area of stationary object
If CMOS configuration is used, then circuit scale is reduced, but complexity of managing multiple transistor types increases
Solution Approach 1:
The patent applies segmentation by dividing the CMOS circuit into distinct functional blocks: oxide semiconductor TFT-based switch transistor sections and LTPS TFT-based drive transistor sections. This segmentation allows each section to be optimized independently while maintaining overall circuit compactness and manageable complexity.
Data Source
AI summary
A circuit includes a first output signal supply line, a second output signal supply line, an output line, a first p-type thin-film transistor disposed between the first output signal supply line and the output line an n-type thin-film transistor disposed between the second output signal supply line and the output line, and a second p-type thin-film transistor disposed between the second output signal supply line and the output line. The n-type thin-film transistor and the second p-type thin-film transistor are configured to be OFF to output a signal on the first output signal supply line to the output line when the first p-type thin-film transistor is ON. The first p-type thin-film transistor is configured to be OFF to supply a signal on the second output signal supply line to the output line when the n-type thin-film transistor and the second p-type thin-film transistor are ON.