LTPS Array Substrate Mask Elimination
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Solution Overview
Problem
The high complexity and cost of producing low temperature poly-silicon (LTPS) array substrates due to the requirement of multiple masks and processes in the LCD technology, which increases production costs and reduces efficiency.
Innovation Solution
A method for producing LTPS array substrates that eliminates the need for masks by exposing one side of the substrate opposite the gate to form a polycrystalline silicon layer, reducing the number and types of masks required, and simplifying the manufacturing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional LTPS manufacturing process with multiple masks is used, then manufacturing precision is improved, but device complexity and production cost increase
Solution Approach 1:
The patent extracts and removes the mask layer from the manufacturing process entirely. Instead of using photoresist masks for pattern transfer, the invention uses the gate electrode itself as a mask during sputtering deposition, eliminating the need for separate mask materials and their associated processing steps while maintaining pattern formation precision.
Solution Approach 2:
The patent introduces a buffer layer as an intermediary between the substrate and the active device structures. This buffer layer serves multiple functions: it provides a foundation for subsequent depositions, acts as a physical barrier, and enables the gate-to-be-used-as-mask approach by providing a surface that can be selectively deposited upon without affecting the substrate directly.
Solution Approach 3:
The patent replaces the photochemical mask system (requiring photoresist coating, exposure, development, and etching) with a direct physical deposition method where the gate electrode serves as a mechanical mask during sputtering. This substitution eliminates the photochemical processing chain while achieving the same pattern transfer function.
2Manufacturing precision
If multiple masks and processes are used, then manufacturing precision is improved, but productivity decreases
Solution Approach 1:
The patent merges the gate electrode formation step with the source/drain region definition step. By using the gate as a mask during sputtering, the process simultaneously creates the gate structure and defines the source/drain regions in a single integrated operation, eliminating separate masking and patterning steps that would reduce productivity.
Solution Approach 2:
The patent performs preliminary deposition of the active layer and gate electrode before using the gate as a mask for source/drain region definition. This preliminary action establishes the gate structure that will subsequently serve as the masking element, eliminating the need for separate mask preparation steps and streamlining the overall process flow.
3Manufacturing precision
If traditional mask-based process is used, then pattern formation precision is improved, but production cost increases
Solution Approach 1:
The patent extracts and eliminates the mask layer from the manufacturing process. By using the gate electrode as a mask during sputtering, the invention removes the need for photoresist materials, mask alignment equipment, and associated processing steps, thereby reducing material costs and equipment requirements while maintaining pattern formation precision.
Solution Approach 2:
The patent eliminates the use of expensive photoresist masks and replaces them with a reusable gate electrode structure. The gate, which must be formed anyway as part of the device, serves as a durable masking element that can be used without consuming additional expensive materials, thereby reducing overall production costs.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces production costs and simplifies the manufacturing process by eliminating the need for masks, thereby enhancing efficiency and lowering the overall cost of producing LTPS array substrates.
Implementation Method 1
exposing one side of the substrate on the opposite side of the gate for preserving the positive photoresist layer disposed on a first section disposed right above the gate only
Implementation Method 2
injecting first impurity ions into the semiconductor layer outside the first section
Data Source
AI summary
An LTPS array substrate and a method for producing the same are proposed. The method includes: forming a gate of a thin-film transistor (TFT) of the LTPS array substrate on a substrate; forming a first insulating layer, a semiconductor layer, and a positive photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for forming a polycrystalline silicon layer; forming a second insulating layer on the substrate of the polycrystalline silicon layer; forming a source and a drain of the TFT on the second insulating layer so that the source and the drain is electrically connected to the polycrystalline silicon layer via a contact hole. The use of masks in types and in numbers in the LTPS technology will be reduced. So, both of the processes and the production costs are reduced.