LTPS TFT Contact Hole and Transparent Electrode Alignment
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Solution Overview
Problem
Conventional methods for manufacturing Low Temperature Polysilicon (LTPS) type Thin Film Transistors (TFTs) are complex, requiring numerous mask processes, which prolongs manufacturing time, increases costs, and reduces efficiency due to the need for multiple masks to form electrical connections between layers.
Innovation Solution
A method for manufacturing LTPS type TFTs involving steps such as forming a silicon channel layer, ion implantation to create doped areas, and forming contact holes that expose these doped areas, allowing for electrical connections with fewer masks, thereby simplifying the process and reducing manufacturing time and costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional methods are used to form electrical connections between layers with multiple masks, then reliable electrical connections are achieved, but manufacturing time is prolonged and costs increase
Solution Approach 1:
The patent combines the formation of contact holes and the alignment of transparent electrodes into a single mask process. The mask pattern is designed to simultaneously define both the contact hole positions and the transparent electrode positions, eliminating the need for separate mask steps and reducing total manufacturing time while maintaining connection reliability
Solution Approach 2:
The mask serves multiple functions: it defines contact hole positions, defines transparent electrode positions, and ensures proper alignment between these features. This multi-functional mask design reduces the number of mask steps required while maintaining the reliability of electrical connections
2Manufacturing precision
If multiple mask processes are used to form film layers and connections, then precise layer alignment is achieved, but manufacturing complexity and costs increase
Solution Approach 1:
The patent merges multiple alignment functions into a single mask design. The mask pattern simultaneously controls contact hole formation and transparent electrode positioning, reducing the number of mask steps from multiple to one, thereby simplifying the manufacturing process while maintaining alignment precision
Solution Approach 2:
The mask is designed in advance with integrated patterns that pre-determine both contact hole and transparent electrode positions. This preliminary design approach ensures proper alignment is achieved in a single step, eliminating the need for multiple sequential alignment operations
3Reliability
If numerous mask processes are employed to form film layers, then complete structural formation is achieved, but operation costs and manufacturing time increase
Solution Approach 1:
The patent combines the formation of contact holes and transparent electrodes into a single mask process, reducing the total number of mask steps required. This merging of operations maintains complete structural formation while significantly improving manufacturing ease by reducing process complexity
Solution Approach 2:
The mask design inherently provides self-alignment features where the same mask pattern that defines contact holes also defines transparent electrode positions. This self-service approach ensures proper structural formation without requiring additional alignment operations or extra mask steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method reduces the number of masks required, decreasing manufacturing time and costs while maintaining high efficiency in forming electrical connections, thus improving the production efficiency of LTPS type TFTs.
Implementation Method 1
performing an ion implantation on a portion of the silicon channel layer to form a doped area
Data Source
AI summary
The present disclosure provides an LTPS type TFT and a method for manufacturing the same. The TFT includes a first contact hole and a second contact hole, where the first contact hole and the second contact hole pass through the third insulating layer, the second insulating layer, and a portion of the first insulating layer, such that a portion of the heavily doped area is exposed. In addition, a transparent electrode is electrically connected to the source/drain electrode or the second gate electrode and a portion of the heavily doped area.