LTPS-TFT Dry Etching Selectivity via Hydrogen Gas
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The conventional dry etching process for low temperature poly-silicon thin film transistors results in significant poly-silicon loss due to poor selectivity of etching gases like CF4 and SF6, affecting the ohmic contact between source/drain and poly-silicon, leading to suboptimal electrical properties.
Innovation Solution
Incorporating a fluorine-containing gas and hydrogen gas in the dry etching process with a specific flow ratio, pressure, and power settings to reduce poly-silicon etching rate and enhance selectivity, thereby minimizing poly-silicon loss and improving ohmic contact formation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional dry etching gas (CF4 or SF6) is used to fabricate contact holes, then the etching rate is relatively large and contact holes can be formed efficiently, but the selectivity to poly-silicon is poor leading to significant poly-silicon loss and degraded ohmic contact
Solution Approach 1:
The patent modifies the chemical composition parameters of the etching gas by introducing hydrogen gas (H2) to form a mixed gas system with fluorocarbon gas (CF4 or SF6). This parameter change transforms the etching chemistry to achieve simultaneous high etching rate and high selectivity, resolving the contradiction between productivity and material loss. The specific formulation uses H2 as the main component (70-100 sccm) combined with CF4 (10-30 sccm) or SF6 (10-30 sccm) at a flow ratio of 5-15:1
Solution Approach 2:
The patent creates a composite etching gas system by combining hydrogen gas with fluorocarbon gas. This composite gas mixture exhibits synergistic effects where H2 provides high etching rate while CF4/SF6 contributes to selectivity through fluorine chemistry. The composite gas system enables formation of contact holes with minimal poly-silicon loss and maintains excellent ohmic contact properties
2Ease of manufacture
If conventional dry etching process is used, then the manufacturing process is simple and fast, but the ohmic contact between source/drain and poly-silicon is degraded due to poly-silicon loss
Solution Approach 1:
The patent maintains process simplicity by continuing to use dry etching methodology while changing the gas composition parameters. The modified gas formula (H2 + CF4/SF6) is implemented using standard semiconductor manufacturing equipment without requiring process redesign. This parameter change achieves superior electrical properties with contact resistance below 100 ohms, maintaining ease of manufacture while improving reliability
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces poly-silicon loss and enhances the electrical properties of the thin film transistor by forming a good ohmic contact between the source/drain and the low temperature poly-silicon layer, resulting in improved transistor performance.
Implementation Method 1
adding a certain amount of H2, and H2 can suppress the fluorine-containing gas such as CF4 or SF6 to etch the underlying poly-silicon
Implementation Method 2
forming a first contact hole and a second contact hole through the dielectric layer and the gate insulator layer by dry etching
Data Source
AI summary
A manufacturing method of a LTPS-TFT is provided, including: providing a substrate, sequentially forming a buffer layer, a low temperature poly-silicon layer, a source contact region, a drain contact region, a gate insulator layer, a gate layer, and a dielectric layer on the substrate, respectively forming a first and a second contact holes through the dielectric layer and the gate insulator layer by dry etching to expose the source and the drain contact regions; and on the dielectric layer, forming a source electrode to contact the source contact region through the first contact hole and a drain electrode to contact the drain contact region through the second contact hole. A LTPS-TFT and an array substrate are also provided.


