Controllable Resistance Spacer Layers for Leakage Reduction in LTPS TFTs
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Solution Overview
Problem
Low temperature polysilicon thin film transistors in liquid crystal display panels suffer from leakage issues, leading to decreased contrast, flicker, and crosstalk, which affect the overall display performance.
Innovation Solution
A manufacturing method for an array substrate that includes forming controllable resistance spacer layers on the source and drain doped regions of the low temperature polysilicon active layer, using ion doping to create regions that block or conduct current based on the gate signal, thereby reducing leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional low temperature polysilicon TFT manufacturing is used, then the display panel achieves faster electron mobility and higher resolution, but the thin film transistor exhibits leakage leading to decreased contrast and flicker
Solution Approach 1:
The source and drain regions are segmented into multiple zones with different doping concentrations. The method forms first doped regions with a first doping concentration and second doped regions with a second doping concentration that is higher than the first, creating a gradient structure that reduces leakage while maintaining electron mobility.
Solution Approach 2:
Different regions of the active layer are given different local properties through selective doping. The source and drain areas have higher doping concentrations to reduce leakage, while the channel region maintains lower doping to preserve electron mobility. This local quality variation resolves the contradiction between speed and reliability.
2Reliability
If higher doping concentration is used to reduce leakage, then the leakage current decreases, but the electron mobility and switching performance deteriorate
Solution Approach 1:
The method changes the doping concentration parameter spatially across different regions of the active layer. By forming regions with different doping concentrations (first doping concentration for source/drain areas, second higher doping concentration for channel regions), the patent optimizes both leakage current and electron mobility through parameter variation.
Solution Approach 2:
The patent introduces dynamic control of electrical properties through multi-stage doping processes. The selective formation of doped regions with different concentrations allows the device to dynamically adjust carrier distribution, achieving low leakage in off-state while maintaining high electron mobility in on-state.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively blocks charge carriers when the gate signal is off and conducts when it's on, significantly reducing leakage in the thin film transistor, thereby enhancing the display panel's performance.
Implementation Method 1
performing an ion doping process for the two exposed portion of the low temperature polysilicon active layer to respectively form a source doped region and a drain doped region
Data Source
AI summary
The disclosure provides a liquid crystal display panel, an array substrate and a manufacturing method thereof. In the method, controllable resistance spacer layers are formed on at least one of a source doped region and a drain doped region of a low temperature polysilicon active layer. When a turn-on signal is not applied to the gate layer, the controllable resistance spacer layers serve as a blocking action for a flowing current; and when the turn-on signal is applied to the gate layer, the controllable resistance spacer layers serve as a conducting action for the flowing current, such that contact regions formed of the controllable resistance spacer layers are respectively connected with the corresponding source layer and the corresponding drain through the controllable resistance spacer layers. Therefore, the disclosure is capable of effectively decreasing a leakage of a thin film transistor.