Bottom-Gate LTPS Thin Film Transistor with Protective Structure
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Solution Overview
Problem
Current thin film transistor processes, particularly in LTPS technology, are complex and costly due to requirements such as shading layers and doping processes, and face challenges like active layer damage during back channel etching and ohmic contact issues in bottom-gate configurations.
Innovation Solution
A bottom-gate thin film transistor design with a protective oxide semiconductor structure on the sides of the source and drain close to the gate, which is in contact with the polysilicon active layer, and an ohmic contact structure between the protective and source/drain, using materials like indium gallium zinc oxide and N-doped amorphous silicon to prevent active layer damage and reduce contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional top-gate LTPS TFT process is used with LS layer and doping, then transistor performance can be maintained, but process complexity increases and manufacturing cost rises
Solution Approach 1:
The patent extracts and removes the LS (shading layer) and doping processes from the conventional top-gate LTPS TFT manufacturing process. By using a bottom-gate configuration with the gate electrode positioned beneath the active layer, the patent eliminates the need for complex shading layer formation and multiple doping steps, thereby reducing process complexity while maintaining transistor performance through the protective structure design
Solution Approach 2:
The patent inverts the conventional top-gate structure to a bottom-gate configuration. Instead of placing the gate electrode above the active layer with complex shading and doping processes, the gate is positioned below the active layer, fundamentally changing the process sequence and eliminating the need for LS layer and doping while achieving the desired transistor characteristics
2Device complexity
If bottom-gate LTPS TFT is used without LS layer and doping, then process is simplified, but active layer damage occurs during back channel etching
Solution Approach 1:
The patent introduces a protective structure as an intermediary element between the etching process and the active layer. This protective structure, formed from a material with different etching characteristics than the active layer, serves as a mediator that allows the back channel etching to proceed while protecting the active layer from damage, thus enabling process simplification without compromising active layer integrity
Solution Approach 2:
The protective structure is formed in advance before the back channel etching process. This preliminary protective layer counteracts the potential harmful effects of the etching process on the active layer, preventing damage before it can occur during the simplification process
3Ease of manufacture
If bottom-gate LTPS TFT is used without LS layer and doping, then manufacturing cost decreases, but ohmic contact problems arise
Solution Approach 1:
The patent applies local quality by creating a protective structure with specific material properties at the critical interface region between the source/drain and the active layer. This localized structure with tailored etching characteristics ensures proper ohmic contact formation in the specific region where contact is needed, while the rest of the process remains simplified and cost-effective
Data Source
AI summary
A thin film transistor and a method for manufacturing the same, an array substrate and an electronic device. The thin film transistor includes a gate, a gate insulator, an active layer, a source and a drain. A protective structure is disposed on a side of the source and the drain close to the gate.