LTPS TFT Substrate Via Conductive Layer Contact Impedance
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Solution Overview
Problem
The existing re-etch LDD technique for manufacturing LTPS TFT substrates results in high contact impedance between source/drain electrodes and source/drain contact regions due to low ionic content, affecting device performance.
Innovation Solution
A modified LTPS TFT substrate manufacturing method involving the formation of vias with an undercut structure, followed by the deposition of conductive layers within these vias, which allows the source/drain electrodes to directly contact the source/drain contact regions, thereby reducing contact impedance and omitting the need for a mask process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If re-etch LDD technique is used to manufacture LTPS TFT substrate, then device performance is improved, but contact impedance between source/drain electrodes and source/drain contact regions becomes high due to low ionic content
Solution Approach 1:
The patent introduces a conductive layer as an intermediary between the source/drain electrode and the source/drain contact region. This conductive layer has higher ionic content than the poly-Si active layer, enabling better charge transport and reducing contact impedance. The conductive layer acts as a mediator that bridges the electrode and contact region, solving the high impedance problem while maintaining device performance.
Solution Approach 2:
The patent changes the ionic content parameter by forming a conductive layer with deliberately increased ionic concentration compared to the standard poly-Si active layer. This parameter change (from low ionic content to high ionic content) directly addresses the contact impedance issue by providing a low-resistance path for charge carriers between the electrode and contact region.
2Manufacturing precision
If mask LDD technique is used to manufacture LTPS TFT substrate, then manufacturing precision is improved, but device complexity and production cost increase due to additional mask process
Solution Approach 1:
The patent extracts and eliminates the mask process from the manufacturing sequence by using the gate electrode itself as the shielding layer during doping. This removal of the mask step simplifies the overall process while maintaining doping precision, as the gate electrode naturally defines the doping regions through its geometric position.
Solution Approach 2:
The gate electrode serves multiple functions: it acts as both the functional gate component and as the shielding layer during the doping process. This multi-functionality eliminates the need for a separate mask layer, reducing process complexity while maintaining the precision needed for defining source/drain and LDD regions.
3Productivity
If re-etch LDD technique is used to omit mask process, then productivity is improved, but contact impedance becomes high due to insufficient ionic content in source/drain contact regions
Solution Approach 1:
The conductive layer serves as an intermediary that resolves the contact impedance issue while maintaining the simplified re-etch LDD process. By inserting this high-ionic-content layer between the electrode and contact region, the patent achieves both high productivity (through mask-less processing) and low contact impedance (through the conductive layer's superior ionic properties).
Solution Approach 2:
The patent segments the contact structure into distinct functional layers: the source/drain contact region in the poly-Si active layer, and a separate conductive layer with higher ionic content. This segmentation allows each layer to perform its optimal function - the poly-Si provides structural integration while the conductive layer provides low-resistance electrical contact.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method effectively reduces contact impedance between source/drain electrodes and contact regions, enhancing device performance while eliminating the need for a mask process, thus saving production costs and time.
Implementation Method 1
coating a photoresist on the ILD layer and obtaining a photoresist layer after exposure and development
Implementation Method 2
conducting dry etching to the ILD layer and the gate insulation layer using the photoresist layer as a shielding layer to form vias
Implementation Method 3
depositing conductive material in the vias to form conductive layers inside the vias
Implementation Method 4
forms source/drain contact regions 310 by implanting N-type ions of a high dosage (P+, 1×1014 ̃1×1015 ions/cm2) to two ends of the poly-Si active layer 300
Data Source
AI summary
The present invention teaches a LTPS TFT substrate and its manufacturing method. The manufacturing method, after forming vias using the photoresist layer on the ILD layer and the gate insulation layer above the source/drain contact regions, and before peeling the photoresist layer, forms conductive layers in the vias by depositing conductive material in the vias. The source/drain electrodes contact the conductive layers in the vias and therefore are conducted to the source/drain contact regions, thereby effectively resolving the problem of contact impedance being too high between the source/drain electrodes and the source/drain contact regions from the existing re-etch LDD technique. Then, through the re-etch LDD technique, the present invention is able to omit a mask process without sacrificing product characteristics. In addition, the vias and the photoresist layer have undercut structure, preventing the deposited conductive material from affecting the photoresist layer's peeling and guaranteeing the photoresist layer's peeling efficiency.