Lightweight Trusted Task Memory Isolation for IoT Security

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Solution Overview

Problem

Existing security solutions for IoT and wearable devices are inadequate due to their high cost and resource constraints, as they rely on traditional coarse-grained separation models that are not scalable for resource-constrained platforms, and do not provide strong security guarantees against dynamic security threats.

Innovation Solution

The implementation of a Lightweight Trusted Task (LTT) primitive, which enables memory isolation, secure interrupts, and secure binding, using Protected Mode features and minimal hardware requirements, allowing for multiple mutually isolated Trusted Execution Environments that can be securely configured and debugged.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional coarse-grained separation models (supervisor/user privileges) are used, then device complexity is reduced, but security reliability is insufficient

Engineering Contradiction:
Improvesecurity guaranteesVSAvoidsecurity architecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the execution environment into multiple fine-grained trusted tasks, each with its own protected memory region and execution context. This segmentation allows stronger security isolation compared to traditional coarse-grained supervisor/user privilege models, while maintaining manageable complexity through structured task management.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple isolated trusted execution environments are implemented, then security reliability improves, but resource consumption increases

Engineering Contradiction:
Improvesecurity isolationVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent merges multiple trusted execution environments into a unified lightweight trusted task framework that runs on standard processor architectures. By combining isolation mechanisms with existing hardware features and using a common execution substrate, the system achieves strong security isolation without proportionally increasing resource consumption.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If fine-grained trusted tasks are implemented, then security reliability improves, but device complexity increases

Engineering Contradiction:
Improvesecurity guaranteesVSAvoidtask management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent creates a universal trusted task framework that can be implemented on standard processor architectures without requiring specialized hardware. The framework provides fine-grained security guarantees through software-managed task contexts that leverage existing processor features, making the solution broadly applicable while maintaining manageable complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Adaptability or versatility

If traditional privilege separation models are used, then ease of operation is maintained, but adaptability to security threats decreases

Engineering Contradiction:
Improveresilience against security threatsVSAvoidoperational simplicity
Core Design Contradiction:
Adaptability or versatilityVSEase of operation

Solution Approach 1:

The patent implements a dynamic trusted task system where execution contexts can be created, switched, and managed flexibly at runtime. This dynamic approach allows the system to adapt to different security requirements and threat scenarios while maintaining operational simplicity through standardized task management interfaces and automatic context switching.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10671547B2Lightweight trusted tasks
Publication Date: 2020.06.02 INTEL CORP
  • US10671547B2 patent drawing
  • US10671547B2 patent drawing
  • US10671547B2 patent drawing

AI summary

Methods and apparatus relating to lightweight trusted tasks are disclosed. In one embodiment, a processor includes a memory interface to a memory to store code, data, and stack segments for a lightweight-trusted task (LTT) mode task and for another task, a LTT control and status register including a lock bit, a processor core to enable LTT-mode, configure the LTT-mode task, and lock down the configuration by writing the lock bit, and a memory protection circuit to: receive a memory access request from the memory interface, the memory access request being associated with the other task, determine whether the memory access request is attempting to access a protected memory region of the LTT-mode task, and protect against the memory access request accessing the protected memory region of the LTT-mode task, regardless of a privilege level of the other task, and regardless of whether the other task is also a LTT-mode task.