LTPO Array Substrate Vertical Transistor Stacking
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Solution Overview
Problem
The current manufacturing process for low temperature polysilicon thin film transistors damages the oxide semiconductor active layer of oxide semiconductor thin film transistors, affecting display performance.
Innovation Solution
The array substrate design includes a first thin film transistor with a low temperature polysilicon active layer and a second thin film transistor with an oxide semiconductor active layer, where the first active layer, gate, and electrodes are positioned between the second active layer and the substrate, allowing for separate processing that prevents damage to the oxide semiconductor active layer during hydrofluoric acid cleaning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the current preparation process is used to manufacture both low temperature polysilicon thin film transistor and oxide semiconductor thin film transistor on the same backplate, then the LTPO technology can be implemented, but the oxide semiconductor active layer is damaged during the manufacturing process
Solution Approach 1:
The patent divides the transistor structure into two separate types: low temperature polysilicon thin film transistors and oxide semiconductor thin film transistors, with each having its own active layer positioned at different heights. This segmentation allows different manufacturing processes to be applied to each transistor type without mutual interference, preventing damage to the oxide semiconductor active layer while maintaining LTPO technology integration
Solution Approach 2:
The patent introduces a vertical dimension to solve the conflict by positioning the oxide semiconductor active layer at a different height than the low temperature polysilicon active layer. Specifically, the oxide semiconductor active layer is positioned above the low temperature polysilicon active layer in the vertical direction, allowing hydrofluoric acid cleaning to reach only the lower active layer without damaging the upper oxide semiconductor active layer
2Ease of manufacture
If hydrofluoric acid cleaning is performed during manufacturing, then the low temperature polysilicon active layer can be cleaned, but the oxide semiconductor active layer is damaged
Solution Approach 1:
The patent positions the oxide semiconductor active layer above the low temperature polysilicon active layer before the cleaning process. This preliminary spatial arrangement ensures that when hydrofluoric acid cleaning is performed, the acid can only reach and clean the lower low temperature polysilicon active layer, while the upper oxide semiconductor active layer is protected from damage
Solution Approach 2:
The patent uses the vertical spatial relationship between the two active layers as an intermediary protective mechanism. The elevated position of the oxide semiconductor active layer acts as a protective arrangement, allowing the hydrofluoric acid to selectively clean the lower active layer without directly contacting and damaging the upper oxide semiconductor active layer
Data Source
AI summary
Provided are an array substrate, a display panel, a display device and a method for manufacturing the array substrate. The array substrate includes a first thin film transistor and a second thin film transistor. The first thin film transistor includes a first active layer, a first gate, a first A-type electrode and a first B-type electrode. The second thin film transistor includes a second active layer, a second gate, a second A-type electrode and a second B-type electrode. In a direction perpendicular to a plane where a substrate is located, a film where the first active layer is located, a film where the first A-type electrode is located, a film where the first B-type electrode is located, and a film where the first gate electrode is located each are disposed between a film where the second active layer is located and the substrate.