3D Lookup Table Centroid Mappings for Interpolation Error
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Solution Overview
Problem
Existing techniques for reducing 3D lookup table interpolation error in display systems face challenges in minimizing on-chip storage requirements, often requiring increased storage to achieve lower error rates.
Innovation Solution
The approach involves storing mappings for the centroids of sub-cubes in the 3D lookup table, rather than increasing the number of vertices, to reduce interpolation error while minimizing on-chip storage. This method uses tetrahedral interpolation with the centroid and three vertices for sub-cubes with high interpolation error, and traditional interpolation for sub-cubes with low error.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of vertices in the 3D lookup table is increased to reduce interpolation error, then interpolation accuracy is improved, but on-chip storage requirements increase
Solution Approach 1:
The patent divides the 3D lookup table into multiple sub-cubes, where each sub-cube can be independently processed. By segmenting the large lookup table into smaller manageable units, the system can apply different interpolation strategies to different regions, reducing the overall storage requirement while maintaining accuracy where needed.
Solution Approach 2:
The patent applies different interpolation methods to different sub-cubes based on their specific characteristics. Some sub-cubes use tetrahedral interpolation with centroids for high accuracy, while others use simpler methods. This local differentiation allows the system to achieve high interpolation accuracy in critical regions without uniformly increasing storage across the entire lookup table.
2Quantity of substance
If traditional interpolation methods are used throughout the entire 3D lookup table, then on-chip storage is minimized, but interpolation error increases
Solution Approach 1:
The patent applies enhanced interpolation methods (using centroids and tetrahedral decomposition) only to specific sub-cubes where interpolation error is most problematic, rather than uniformly applying them throughout the entire lookup table. This partial application reduces the overall storage overhead while still significantly improving interpolation accuracy in the most critical regions.
Data Source
AI summary
Systems, apparatuses, and methods for reducing three dimensional (3D) lookup table (LUT) interpolation error while minimizing on-chip storage are disclosed. A processor generates a plurality of mappings from a first gamut to a second gamut at locations interspersed throughout a 3D representation of the pixel component space. For example, in one implementation, the processor calculates mappings for 17×17×17 vertices within the 3D representation. Other implementations can include other numbers of vertices. Rather than increasing the number of vertices to reduce interpolation error, the processor calculates mappings for centroids of the sub-cubes defined by the vertices within the 3D representation of the first gamut. This results in a smaller increase to the LUT size as compared to increasing the number of vertices. The centroid mappings are used for performing tetrahedral interpolation to map source pixels in the first gamut into the second gamut with a reduced amount of interpolation error.