LUT-Based In-Memory Computing With Divide-and-Conquer Scaling

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Solution Overview

Problem

Existing compute-in-memory (CiM) technologies face challenges with scalability, energy consumption, and area overhead, particularly in LUT-based methods, which are not efficiently optimized for low-latency and low-energy operations.

Innovation Solution

A divide and conquer (D&C) approach is applied to decompose complex computations into smaller sub-operations, utilizing LUT-based methods with most significant bit (MSB) and least significant bit (LSB) sub-operations, optimizing storage and energy consumption through selective result retrieval and addition.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If LUT-based compute-in-memory methods are used, then computational operations can be performed in memory, but area overhead and energy consumption are excessively high

Engineering Contradiction:
Improvecomputational operation speedVSAvoidarea overhead
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The patent segments the LUT-based computational operations into distinct functional blocks including address generation units, memory array sections, and result processing units. This segmentation allows parallel operation of multiple functional units, improving computational throughput while optimizing the area utilization by avoiding redundant circuitry across the entire LUT structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a two-dimensional LUT structure to a three-dimensional stacked memory architecture. This dimensional change enables vertical stacking of multiple LUT layers, significantly increasing computational capacity and area efficiency without proportionally increasing the footprint area, thereby resolving the contradiction between productivity and area overhead.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If LUT-based compute-in-memory methods are used, then computational operations can be performed in memory, but energy consumption is excessively high

Engineering Contradiction:
Improvecomputational operation speedVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSUse of energy by stationary object

Solution Approach 1:

The patent implements preliminary action by pre-computing and storing intermediate results in the memory array before final computation. This allows the system to retrieve pre-processed data instead of performing full computational operations during execution, significantly reducing energy consumption while maintaining high computational productivity through efficient data reuse.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent replaces traditional digital computational mechanics with analog or hybrid computing mechanisms within the memory array. This substitution enables mathematical operations to be performed through physical phenomena (such as resistive switching or capacitive coupling) rather than sequential digital logic operations, dramatically reducing energy consumption per operation while maintaining high computational throughput.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Device complexity

If traditional Von-Neumann computing is used, then data storage and processing are separated, but memory-fetch latency is high

Engineering Contradiction:
Improvememory architecture simplicityVSAvoidmemory-fetch latency
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The patent merges the data storage function and computational processing function into a unified compute-in-memory architecture. By integrating processing units directly within the memory array, the system eliminates the separate memory-fetch step inherent in Von-Neumann architecture, reducing memory-fetch latency to near-zero while maintaining relatively simple memory access patterns through standardized interface protocols.

Inventive Principle:
Principle #5Merging (Combining)

4Use of energy by stationary object

If newer memory technologies (RRAM, PCM, STT-MRAM) are used for CiM, then energy efficiency and area overhead are improved, but scalability is problematic

Engineering Contradiction:
Improveenergy efficiencyVSAvoidscalability
Core Design Contradiction:
Use of energy by stationary objectVSAdaptability or versatility

Solution Approach 1:

The patent implements a universal compute-in-memory architecture that can operate with multiple memory technology types (SRAM, DRAM, RRAM, PCM, STT-MRAM). The design uses standardized interface layers and adaptive control circuits that automatically adjust operational parameters based on the underlying memory technology, enabling the system to achieve high energy efficiency and area efficiency with newer memory technologies while maintaining scalability through technology-agnostic design principles.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12561240B2Look-up table-based in-memory computing system
Publication Date: 2026.02.24 UNIV OF FLORIDA RESEARCH FOUNDATION INC
  • US12561240B2 patent drawing
  • US12561240B2 patent drawing
  • US12561240B2 patent drawing

AI summary

A method and system are directed to providing a look-up table (LUT)-based computation method targeted toward compute-in-memory (CiM) applications. The method comprises a divide and conquer-based approach to provide a solution to scalability challenges in LUT-based mathematical operations for CiM applications. The divide and conquer approach distributes a complex operation into smaller, less complex operations.