Lookup Table Interpolation Circuit for Faster Approximation
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Solution Overview
Problem
Manually calculating complex mathematical formulas repeatedly on large data sets is computationally expensive, and existing lookup table methods are inefficient due to time-intensive dual LUT accesses.
Innovation Solution
Implement a restructured LUT configuration with higher-order bits indexing lower precision data, using linear interpolation to estimate intermediate values, and employing combinational logic for enhanced precision through techniques like nearest power of two calculation and slope-based extrapolation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If traditional LUT methods are used to pre-compute and store formula results, then calculation speed is improved, but memory access time increases due to dual LUT accesses
Solution Approach 1:
The patent segments the input value into multiple parts (e.g., high-order bits and low-order bits) and uses each segment to access different LUTs. This segmentation allows the system to retrieve multiple components of the final result through separate, optimized memory accesses rather than requiring a single dual LUT access, thereby reducing overall memory access time while maintaining calculation speed.
Solution Approach 2:
The patent transforms the traditional single-dimension LUT access into a multi-dimensional access scheme by using different bit segments of the input value to index into multiple LUTs simultaneously. This dimensional transformation enables parallel retrieval of result components from different memory locations, effectively reducing the time penalty associated with dual LUT accesses while preserving the speed advantage of pre-computed results.
2Manufacturing precision
If LUT resolution is increased to improve precision, then manufacturing precision is improved, but device complexity and memory requirements increase
Solution Approach 1:
The patent divides the high-resolution LUT into multiple smaller, lower-resolution LUTs that are accessed using segmented input values. Instead of implementing one large complex LUT structure, the system uses several simpler LUTs whose results are combined through arithmetic operations. This segmentation maintains the effective precision of a high-resolution LUT while significantly reducing the complexity of individual LUT structures and their implementation.
Solution Approach 2:
The patent merges the outputs of multiple lower-resolution LUTs through arithmetic operations (such as addition, multiplication, or interpolation) to produce a final result that achieves the precision equivalent to a single high-resolution LUT. This combining approach allows the system to attain high manufacturing precision without requiring any single LUT to be overly complex, distributing the computational burden across multiple simpler components.
3Measurement precision
If manual calculation of complex mathematical formulas is performed, then calculation accuracy is maintained, but productivity decreases due to computational expense
Solution Approach 1:
The patent performs preliminary calculations by pre-computing formula results for various input ranges and storing them in LUTs during an offline phase. During runtime, instead of performing complex mathematical calculations, the system simply retrieves pre-computed values from the LUTs using the input value as an index. This preliminary action maintains calculation accuracy by using exact pre-computed results while dramatically improving productivity by eliminating repetitive complex computations.
Solution Approach 2:
The patent creates copies of pre-computed formula results and stores them in LUT memory structures. Rather than recalculating the same complex mathematical formulas repeatedly, the system copies the results into accessible memory locations and retrieves them through simple index-based access. This copying approach preserves the accuracy of manual calculations while enhancing productivity by replacing expensive computational operations with fast memory retrieval operations.
Data Source
AI summary
In one implementation, a circuit includes an input having a plurality of input nodes including upper bit nodes and lower bit nodes. A look up table includes address inputs coupled to receive upper bits from the upper bit nodes. An interpolator includes an input coupled to the lower bit nodes. The interpolator is configured to simultaneously retrieve contents from a first look up table entry and a second look up table entry based on the upper bits and to estimate an approximated value using the lower bits and the contents retrieved from the first look up table entry and the second look up table entry.