Programmable Logic Device LUT Over-ride Element for Die Area Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Programmable logic devices (PLDs) face challenges in minimizing die area when using dedicated hardware for non-LUT logic functions, as the additional output muxes required increase the chip area, especially with 3:1 muxes in devices like the Stratix II, which limits the LUT's ability to perform logic functions.
Innovation Solution
A programmable logic device with an N-stage Look Up Table (LUT) and dedicated hardware for performing non-LUT logic functions, featuring an over-ride element that selectively routes either LUT configuration bits or non-LUT logic function outputs within the LUT, minimizing area costs by allowing flexible output selection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If dedicated hardware for non-LUT logic functions is added to PLDs, then arithmetic capabilities are enhanced, but die area increases due to additional output muxes
Solution Approach 1:
The LUT output is designed to serve dual purposes: it can function as a standard logic output through configuration bits OR as an arithmetic output from dedicated hardware (adder, subtractor, multiplier, divider). The over-ride element enables the LUT output to be selectively forced to accept the non-LUT logic function output, making the same physical resource serve multiple functions without requiring separate dedicated output paths for arithmetic operations.
Solution Approach 2:
An over-ride element is introduced as an intermediary mechanism between the LUT configuration and the output mux. This over-ride element selectively forces the muxing stage to choose between configuration bit inputs and non-LUT logic function outputs. By inserting this control mechanism, the patent enables flexible routing that allows arithmetic outputs to share the LUT output path without requiring additional dedicated muxes, thereby reducing die area while maintaining full arithmetic functionality.
2Adaptability or versatility
If 3:1 output muxes are used in Stratix II devices, then non-LUT logic function outputs can be routed, but LUT's ability to perform logic functions is limited and chip area increases
Solution Approach 1:
The LUT output structure is enhanced to be universally applicable to both logic functions and arithmetic functions. By introducing the over-ride element, the same LUT output infrastructure can accommodate either configuration-based logic outputs or dedicated hardware arithmetic outputs, eliminating the need for separate dedicated output paths and reducing overall chip area.
Solution Approach 2:
The output routing is made dynamic through the over-ride element, which can selectively change the mux selection based on operational mode. When arithmetic operations are needed, the over-ride element forces the mux to select the non-LUT logic function output; when logic operations are needed, normal configuration bit routing is restored. This dynamic adaptability allows a single infrastructure to serve multiple purposes without requiring static dedicated paths for each function type.
Data Source
AI summary
A programmable logic device having a Logic Element with an N-stage Look Up Table (LUT), dedicated hardware for performing a non-LUT logic function, and an over-ride element configured to selectively force a muxing stage within the N-stage LUT to select either one or more LUT configuration bit inputs or the output of the non-LUT logic function as the output of the LUT. In various embodiments, the non-LUT functions can include addition, subtraction, multiplication, division, digital signal processing, memory storage, etc.


